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      1 ; RUN: llc < %s -mtriple=i386-apple-darwin10
      2 ; PR4910
      3 
      4 %0 = type { i32, i32, i32, i32 }
      5 
      6 @boot_cpu_id = external global i32                ; <i32*> [#uses=1]
      7 @cpu_logical = common global i32 0, align 4       ; <i32*> [#uses=1]
      8 
      9 define void @topo_probe_0xb() nounwind ssp {
     10 entry:
     11   br label %for.cond
     12 
     13 for.cond:                                         ; preds = %for.inc38, %entry
     14   %0 = phi i32 [ 0, %entry ], [ %inc40, %for.inc38 ] ; <i32> [#uses=3]
     15   %cmp = icmp slt i32 %0, 3                       ; <i1> [#uses=1]
     16   br i1 %cmp, label %for.body, label %for.end41
     17 
     18 for.body:                                         ; preds = %for.cond
     19   %1 = tail call %0 asm sideeffect "cpuid", "={ax},={bx},={cx},={dx},0,{cx},~{dirflag},~{fpsr},~{flags}"(i32 11, i32 %0) nounwind ; <%0> [#uses=3]
     20   %asmresult.i = extractvalue %0 %1, 0            ; <i32> [#uses=1]
     21   %asmresult10.i = extractvalue %0 %1, 2          ; <i32> [#uses=1]
     22   %and = and i32 %asmresult.i, 31                 ; <i32> [#uses=2]
     23   %shr42 = lshr i32 %asmresult10.i, 8             ; <i32> [#uses=1]
     24   %and12 = and i32 %shr42, 255                    ; <i32> [#uses=2]
     25   %cmp14 = icmp eq i32 %and12, 0                  ; <i1> [#uses=1]
     26   br i1 %cmp14, label %for.end41, label %lor.lhs.false
     27 
     28 lor.lhs.false:                                    ; preds = %for.body
     29   %asmresult9.i = extractvalue %0 %1, 1           ; <i32> [#uses=1]
     30   %and7 = and i32 %asmresult9.i, 65535            ; <i32> [#uses=1]
     31   %cmp16 = icmp eq i32 %and7, 0                   ; <i1> [#uses=1]
     32   br i1 %cmp16, label %for.end41, label %for.cond17.preheader
     33 
     34 for.cond17.preheader:                             ; preds = %lor.lhs.false
     35   %tmp24 = load i32, i32* @boot_cpu_id                 ; <i32> [#uses=1]
     36   %shr26 = ashr i32 %tmp24, %and                  ; <i32> [#uses=1]
     37   br label %for.body20
     38 
     39 for.body20:                                       ; preds = %for.body20, %for.cond17.preheader
     40   %2 = phi i32 [ 0, %for.cond17.preheader ], [ %inc32, %for.body20 ] ; <i32> [#uses=2]
     41   %cnt.143 = phi i32 [ 0, %for.cond17.preheader ], [ %inc.cnt.1, %for.body20 ] ; <i32> [#uses=1]
     42   %shr23 = ashr i32 %2, %and                      ; <i32> [#uses=1]
     43   %cmp27 = icmp eq i32 %shr23, %shr26             ; <i1> [#uses=1]
     44   %inc = zext i1 %cmp27 to i32                    ; <i32> [#uses=1]
     45   %inc.cnt.1 = add i32 %inc, %cnt.143             ; <i32> [#uses=2]
     46   %inc32 = add nsw i32 %2, 1                      ; <i32> [#uses=2]
     47   %exitcond = icmp eq i32 %inc32, 255             ; <i1> [#uses=1]
     48   br i1 %exitcond, label %for.end, label %for.body20
     49 
     50 for.end:                                          ; preds = %for.body20
     51   %cmp34 = icmp eq i32 %and12, 1                  ; <i1> [#uses=1]
     52   br i1 %cmp34, label %if.then35, label %for.inc38
     53 
     54 if.then35:                                        ; preds = %for.end
     55   store i32 %inc.cnt.1, i32* @cpu_logical
     56   br label %for.inc38
     57 
     58 for.inc38:                                        ; preds = %for.end, %if.then35
     59   %inc40 = add nsw i32 %0, 1                      ; <i32> [#uses=1]
     60   br label %for.cond
     61 
     62 for.end41:                                        ; preds = %lor.lhs.false, %for.body, %for.cond
     63   ret void
     64 }
     65