1 ; RUN: llc < %s -mcpu=generic | FileCheck %s 2 ; PR6941 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" 4 target triple = "x86_64-apple-darwin10.0.0" 5 6 define i32 @snd_xbytes(i32 %v, i32 %from, i32 %to) nounwind readnone ssp { 7 entry: 8 %cmp19 = icmp eq i32 %to, 0 ; <i1> [#uses=1] 9 br i1 %cmp19, label %while.end, label %while.cond 10 11 while.cond: ; preds = %entry, %while.cond 12 %y.021 = phi i32 [ %rem, %while.cond ], [ %to, %entry ] ; <i32> [#uses=3] 13 %x.020 = phi i32 [ %y.021, %while.cond ], [ %from, %entry ] ; <i32> [#uses=1] 14 %rem = urem i32 %x.020, %y.021 ; <i32> [#uses=2] 15 %cmp = icmp eq i32 %rem, 0 ; <i1> [#uses=1] 16 br i1 %cmp, label %while.end, label %while.cond 17 18 while.end: ; preds = %while.cond, %entry 19 %x.0.lcssa = phi i32 [ %from, %entry ], [ %y.021, %while.cond ] ; <i32> [#uses=2] 20 %div = udiv i32 %from, %x.0.lcssa ; <i32> [#uses=1] 21 %div11 = udiv i32 %to, %x.0.lcssa ; <i32> [#uses=1] 22 %conv = zext i32 %v to i64 ; <i64> [#uses=1] 23 %conv14 = zext i32 %div11 to i64 ; <i64> [#uses=1] 24 ; Verify that we don't clobber %eax after putting the imulq result in %rax 25 ; CHECK: imulq %r{{.}}x, %r[[RES:..]] 26 ; CHECK-NOT: movl {{.*}}, %e[[RES]] 27 ; CHECK: div 28 %mul = mul i64 %conv14, %conv ; <i64> [#uses=1] 29 %conv16 = zext i32 %div to i64 ; <i64> [#uses=1] 30 %div17 = udiv i64 %mul, %conv16 ; <i64> [#uses=1] 31 %conv18 = trunc i64 %div17 to i32 ; <i32> [#uses=1] 32 ret i32 %conv18 33 } 34
