1 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx,+f16c | FileCheck %s 2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+f16c | FileCheck %s 3 4 define <4 x float> @test_x86_vcvtph2ps_128(<8 x i16> %a0) { 5 ; CHECK-LABEL: test_x86_vcvtph2ps_128: 6 ; CHECK-NOT: vmov 7 ; CHECK: vcvtph2ps 8 %res = call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %a0) ; <<4 x float>> [#uses=1] 9 ret <4 x float> %res 10 } 11 declare <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16>) nounwind readonly 12 13 14 define <8 x float> @test_x86_vcvtph2ps_256(<8 x i16> %a0) { 15 ; CHECK-LABEL: test_x86_vcvtph2ps_256: 16 ; CHECK-NOT: vmov 17 ; CHECK: vcvtph2ps 18 %res = call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %a0) ; <<8 x float>> [#uses=1] 19 ret <8 x float> %res 20 } 21 declare <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16>) nounwind readonly 22 23 define <8 x float> @test_x86_vcvtph2ps_256_m(<8 x i16>* nocapture %a) nounwind { 24 entry: 25 ; CHECK-LABEL: test_x86_vcvtph2ps_256_m: 26 ; CHECK-NOT: vmov 27 ; CHECK: vcvtph2ps (% 28 %tmp1 = load <8 x i16>, <8 x i16>* %a, align 16 29 %0 = tail call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %tmp1) 30 ret <8 x float> %0 31 } 32 33 define <8 x i16> @test_x86_vcvtps2ph_128(<4 x float> %a0) { 34 ; CHECK-LABEL: test_x86_vcvtps2ph_128: 35 ; CHECK-NOT: vmov 36 ; CHECK: vcvtps2ph 37 %res = call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %a0, i32 0) ; <<8 x i16>> [#uses=1] 38 ret <8 x i16> %res 39 } 40 declare <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float>, i32) nounwind readonly 41 42 define <8 x i16> @test_x86_vcvtps2ph_256(<8 x float> %a0) { 43 ; CHECK-LABEL: test_x86_vcvtps2ph_256: 44 ; CHECK-NOT: vmov 45 ; CHECK: vcvtps2ph 46 %res = call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %a0, i32 0) ; <<8 x i16>> [#uses=1] 47 ret <8 x i16> %res 48 } 49 declare <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float>, i32) nounwind readonly 50 51 define <4 x float> @test_x86_vcvtps2ph_128_scalar(i64* %ptr) { 52 ; CHECK-LABEL: test_x86_vcvtps2ph_128_scalar: 53 ; CHECK-NOT: vmov 54 ; CHECK: vcvtph2ps (% 55 56 %load = load i64, i64* %ptr 57 %ins1 = insertelement <2 x i64> undef, i64 %load, i32 0 58 %ins2 = insertelement <2 x i64> %ins1, i64 0, i32 1 59 %bc = bitcast <2 x i64> %ins2 to <8 x i16> 60 %res = tail call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %bc) #2 61 ret <4 x float> %res 62 } 63 64 define void @test_x86_vcvtps2ph_256_m(<8 x i16>* nocapture %d, <8 x float> %a) nounwind { 65 entry: 66 ; CHECK-LABEL: test_x86_vcvtps2ph_256_m: 67 ; CHECK-NOT: vmov 68 ; CHECK: vcvtps2ph $3, %ymm0, (% 69 %0 = tail call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %a, i32 3) 70 store <8 x i16> %0, <8 x i16>* %d, align 16 71 ret void 72 } 73 74 define void @test_x86_vcvtps2ph_128_m(<4 x i16>* nocapture %d, <4 x float> %a) nounwind { 75 entry: 76 ; CHECK-LABEL: test_x86_vcvtps2ph_128_m: 77 ; CHECK-NOT: vmov 78 ; CHECK: vcvtps2ph $3, %xmm0, (% 79 %0 = tail call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %a, i32 3) 80 %1 = shufflevector <8 x i16> %0, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 81 store <4 x i16> %1, <4 x i16>* %d, align 8 82 ret void 83 } 84 85 define void @test_x86_vcvtps2ph_128_m2(double* nocapture %hf4x16, <4 x float> %f4x32) #0 { 86 entry: 87 ; CHECK-LABEL: test_x86_vcvtps2ph_128_m2: 88 ; CHECK-NOT: vmov 89 ; CHECK: vcvtps2ph $3, %xmm0, (% 90 %0 = tail call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %f4x32, i32 3) 91 %1 = bitcast <8 x i16> %0 to <2 x double> 92 %vecext = extractelement <2 x double> %1, i32 0 93 store double %vecext, double* %hf4x16, align 8 94 ret void 95 } 96 97 define void @test_x86_vcvtps2ph_128_m3(i64* nocapture %hf4x16, <4 x float> %f4x32) #0 { 98 entry: 99 ; CHECK-LABEL: test_x86_vcvtps2ph_128_m3: 100 ; CHECK-NOT: vmov 101 ; CHECK: vcvtps2ph $3, %xmm0, (% 102 %0 = tail call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %f4x32, i32 3) 103 %1 = bitcast <8 x i16> %0 to <2 x i64> 104 %vecext = extractelement <2 x i64> %1, i32 0 105 store i64 %vecext, i64* %hf4x16, align 8 106 ret void 107 } 108
