1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -fast-isel -fast-isel-abort=1 -asm-verbose=0 | FileCheck %s 2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -fast-isel -fast-isel-abort=1 -asm-verbose=0 | FileCheck %s 3 ; 4 ; Bitcasts between 128-bit vector types are no-ops since no instruction is 5 ; needed for the conversion. 6 7 define <2 x i64> @v4i32_to_v2i64(<4 x i32> %a) { 8 ;CHECK-LABEL: v4i32_to_v2i64: 9 ;CHECK-NEXT: .cfi_startproc 10 ;CHECK-NEXT: ret 11 %1 = bitcast <4 x i32> %a to <2 x i64> 12 ret <2 x i64> %1 13 } 14 15 define <2 x i64> @v8i16_to_v2i64(<8 x i16> %a) { 16 ;CHECK-LABEL: v8i16_to_v2i64: 17 ;CHECK-NEXT: .cfi_startproc 18 ;CHECK-NEXT: ret 19 %1 = bitcast <8 x i16> %a to <2 x i64> 20 ret <2 x i64> %1 21 } 22 23 define <2 x i64> @v16i8_to_v2i64(<16 x i8> %a) { 24 ;CHECK-LABEL: v16i8_to_v2i64: 25 ;CHECK-NEXT: .cfi_startproc 26 ;CHECK-NEXT: ret 27 %1 = bitcast <16 x i8> %a to <2 x i64> 28 ret <2 x i64> %1 29 } 30 31 define <2 x i64> @v2f64_to_v2i64(<2 x double> %a) { 32 ;CHECK-LABEL: v2f64_to_v2i64: 33 ;CHECK-NEXT: .cfi_startproc 34 ;CHECK-NEXT: ret 35 %1 = bitcast <2 x double> %a to <2 x i64> 36 ret <2 x i64> %1 37 } 38 39 define <2 x i64> @v4f32_to_v2i64(<4 x float> %a) { 40 ;CHECK-LABEL: v4f32_to_v2i64: 41 ;CHECK-NEXT: .cfi_startproc 42 ;CHECK-NEXT: ret 43 %1 = bitcast <4 x float> %a to <2 x i64> 44 ret <2 x i64> %1 45 } 46 47 define <4 x i32> @v2i64_to_v4i32(<2 x i64> %a) { 48 ;CHECK-LABEL: v2i64_to_v4i32: 49 ;CHECK-NEXT: .cfi_startproc 50 ;CHECK-NEXT: ret 51 %1 = bitcast <2 x i64> %a to <4 x i32> 52 ret <4 x i32> %1 53 } 54 55 define <4 x i32> @v8i16_to_v4i32(<8 x i16> %a) { 56 ;CHECK-LABEL: v8i16_to_v4i32: 57 ;CHECK-NEXT: .cfi_startproc 58 ;CHECK-NEXT: ret 59 %1 = bitcast <8 x i16> %a to <4 x i32> 60 ret <4 x i32> %1 61 } 62 63 define <4 x i32> @v16i8_to_v4i32(<16 x i8> %a) { 64 ;CHECK-LABEL: v16i8_to_v4i32: 65 ;CHECK-NEXT: .cfi_startproc 66 ;CHECK-NEXT: ret 67 %1 = bitcast <16 x i8> %a to <4 x i32> 68 ret <4 x i32> %1 69 } 70 71 define <4 x i32> @v2f64_to_v4i32(<2 x double> %a) { 72 ;CHECK-LABEL: v2f64_to_v4i32: 73 ;CHECK-NEXT: .cfi_startproc 74 ;CHECK-NEXT: ret 75 %1 = bitcast <2 x double> %a to <4 x i32> 76 ret <4 x i32> %1 77 } 78 79 define <4 x i32> @v4f32_to_v4i32(<4 x float> %a) { 80 ;CHECK-LABEL: v4f32_to_v4i32: 81 ;CHECK-NEXT: .cfi_startproc 82 ;CHECK-NEXT: ret 83 %1 = bitcast <4 x float> %a to <4 x i32> 84 ret <4 x i32> %1 85 } 86 87 define <8 x i16> @v2i64_to_v8i16(<2 x i64> %a) { 88 ;CHECK-LABEL: v2i64_to_v8i16: 89 ;CHECK-NEXT: .cfi_startproc 90 ;CHECK-NEXT: ret 91 %1 = bitcast <2 x i64> %a to <8 x i16> 92 ret <8 x i16> %1 93 } 94 95 define <8 x i16> @v4i32_to_v8i16(<4 x i32> %a) { 96 ;CHECK-LABEL: v4i32_to_v8i16: 97 ;CHECK-NEXT: .cfi_startproc 98 ;CHECK-NEXT: ret 99 %1 = bitcast <4 x i32> %a to <8 x i16> 100 ret <8 x i16> %1 101 } 102 103 define <8 x i16> @v16i8_to_v8i16(<16 x i8> %a) { 104 ;CHECK-LABEL: v16i8_to_v8i16: 105 ;CHECK-NEXT: .cfi_startproc 106 ;CHECK-NEXT: ret 107 %1 = bitcast <16 x i8> %a to <8 x i16> 108 ret <8 x i16> %1 109 } 110 111 define <8 x i16> @v2f64_to_v8i16(<2 x double> %a) { 112 ;CHECK-LABEL: v2f64_to_v8i16: 113 ;CHECK-NEXT: .cfi_startproc 114 ;CHECK-NEXT: ret 115 %1 = bitcast <2 x double> %a to <8 x i16> 116 ret <8 x i16> %1 117 } 118 119 define <8 x i16> @v4f32_to_v8i16(<4 x float> %a) { 120 ;CHECK-LABEL: v4f32_to_v8i16: 121 ;CHECK-NEXT: .cfi_startproc 122 ;CHECK-NEXT: ret 123 %1 = bitcast <4 x float> %a to <8 x i16> 124 ret <8 x i16> %1 125 } 126 127 define <16 x i8> @v8i16_to_v16i8(<8 x i16> %a) { 128 ;CHECK-LABEL: v8i16_to_v16i8: 129 ;CHECK-NEXT: .cfi_startproc 130 ;CHECK-NEXT: ret 131 %1 = bitcast <8 x i16> %a to <16 x i8> 132 ret <16 x i8> %1 133 } 134 135 define <16 x i8> @v2i64_to_v16i8(<2 x i64> %a) { 136 ;CHECK-LABEL: v2i64_to_v16i8: 137 ;CHECK-NEXT: .cfi_startproc 138 ;CHECK-NEXT: ret 139 %1 = bitcast <2 x i64> %a to <16 x i8> 140 ret <16 x i8> %1 141 } 142 143 define <16 x i8> @v4i32_to_v16i8(<4 x i32> %a) { 144 ;CHECK-LABEL: v4i32_to_v16i8: 145 ;CHECK-NEXT: .cfi_startproc 146 ;CHECK-NEXT: ret 147 %1 = bitcast <4 x i32> %a to <16 x i8> 148 ret <16 x i8> %1 149 } 150 151 define <16 x i8> @v2f64_to_v16i8(<2 x double> %a) { 152 ;CHECK-LABEL: v2f64_to_v16i8: 153 ;CHECK-NEXT: .cfi_startproc 154 ;CHECK-NEXT: ret 155 %1 = bitcast <2 x double> %a to <16 x i8> 156 ret <16 x i8> %1 157 } 158 159 define <16 x i8> @v4f32_to_v16i8(<4 x float> %a) { 160 ;CHECK-LABEL: v4f32_to_v16i8: 161 ;CHECK-NEXT: .cfi_startproc 162 ;CHECK-NEXT: ret 163 %1 = bitcast <4 x float> %a to <16 x i8> 164 ret <16 x i8> %1 165 } 166 167 define <4 x float> @v16i8_to_v4f32(<16 x i8> %a) { 168 ;CHECK-LABEL: v16i8_to_v4f32: 169 ;CHECK-NEXT: .cfi_startproc 170 ;CHECK-NEXT: ret 171 %1 = bitcast <16 x i8> %a to <4 x float> 172 ret <4 x float> %1 173 } 174 175 define <4 x float> @v8i16_to_v4f32(<8 x i16> %a) { 176 ;CHECK-LABEL: v8i16_to_v4f32: 177 ;CHECK-NEXT: .cfi_startproc 178 ;CHECK-NEXT: ret 179 %1 = bitcast <8 x i16> %a to <4 x float> 180 ret <4 x float> %1 181 } 182 183 define <4 x float> @v2i64_to_v4f32(<2 x i64> %a) { 184 ;CHECK-LABEL: v2i64_to_v4f32: 185 ;CHECK-NEXT: .cfi_startproc 186 ;CHECK-NEXT: ret 187 %1 = bitcast <2 x i64> %a to <4 x float> 188 ret <4 x float> %1 189 } 190 191 define <4 x float> @v4i32_to_v4f32(<4 x i32> %a) { 192 ;CHECK-LABEL: v4i32_to_v4f32: 193 ;CHECK-NEXT: .cfi_startproc 194 ;CHECK-NEXT: ret 195 %1 = bitcast <4 x i32> %a to <4 x float> 196 ret <4 x float> %1 197 } 198 199 define <4 x float> @v2f64_to_v4f32(<2 x double> %a) { 200 ;CHECK-LABEL: v2f64_to_v4f32: 201 ;CHECK-NEXT: .cfi_startproc 202 ;CHECK-NEXT: ret 203 %1 = bitcast <2 x double> %a to <4 x float> 204 ret <4 x float> %1 205 } 206 207 define <2 x double> @v4f32_to_v2f64(<4 x float> %a) { 208 ;CHECK-LABEL: v4f32_to_v2f64: 209 ;CHECK-NEXT: .cfi_startproc 210 ;CHECK-NEXT: ret 211 %1 = bitcast <4 x float> %a to <2 x double> 212 ret <2 x double> %1 213 } 214 215 define <2 x double> @v16i8_to_v2f64(<16 x i8> %a) { 216 ;CHECK-LABEL: v16i8_to_v2f64: 217 ;CHECK-NEXT: .cfi_startproc 218 ;CHECK-NEXT: ret 219 %1 = bitcast <16 x i8> %a to <2 x double> 220 ret <2 x double> %1 221 } 222 223 define <2 x double> @v8i16_to_v2f64(<8 x i16> %a) { 224 ;CHECK-LABEL: v8i16_to_v2f64: 225 ;CHECK-NEXT: .cfi_startproc 226 ;CHECK-NEXT: ret 227 %1 = bitcast <8 x i16> %a to <2 x double> 228 ret <2 x double> %1 229 } 230 231 define <2 x double> @v2i64_to_v2f64(<2 x i64> %a) { 232 ;CHECK-LABEL: v2i64_to_v2f64: 233 ;CHECK-NEXT: .cfi_startproc 234 ;CHECK-NEXT: ret 235 %1 = bitcast <2 x i64> %a to <2 x double> 236 ret <2 x double> %1 237 } 238 239 define <2 x double> @v4i32_to_v2f64(<4 x i32> %a) { 240 ;CHECK-LABEL: v4i32_to_v2f64: 241 ;CHECK-NEXT: .cfi_startproc 242 ;CHECK-NEXT: ret 243 %1 = bitcast <4 x i32> %a to <2 x double> 244 ret <2 x double> %1 245 } 246