1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2 3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3 4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41 5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 7 8 define <4 x i32> @load_zmov_4i32_to_0zzz(<4 x i32> *%ptr) { 9 ; SSE-LABEL: load_zmov_4i32_to_0zzz: 10 ; SSE: # BB#0: # %entry 11 ; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 12 ; SSE-NEXT: retq 13 ; 14 ; AVX-LABEL: load_zmov_4i32_to_0zzz: 15 ; AVX: # BB#0: # %entry 16 ; AVX-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero 17 ; AVX-NEXT: retq 18 19 entry: 20 %X = load <4 x i32>, <4 x i32>* %ptr 21 %Y = shufflevector <4 x i32> %X, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 4, i32 4> 22 ret <4 x i32>%Y 23 } 24 25 define <2 x i64> @load_zmov_2i64_to_0z(<2 x i64> *%ptr) { 26 ; SSE-LABEL: load_zmov_2i64_to_0z: 27 ; SSE: # BB#0: # %entry 28 ; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 29 ; SSE-NEXT: retq 30 ; 31 ; AVX-LABEL: load_zmov_2i64_to_0z: 32 ; AVX: # BB#0: # %entry 33 ; AVX-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero 34 ; AVX-NEXT: retq 35 36 entry: 37 %X = load <2 x i64>, <2 x i64>* %ptr 38 %Y = shufflevector <2 x i64> %X, <2 x i64> zeroinitializer, <2 x i32> <i32 0, i32 2> 39 ret <2 x i64>%Y 40 } 41
