1 ; RUN: llc < %s -march=x86 | FileCheck -check-prefix=X86 %s 2 ; RUN: llc < %s -march=x86-64 | FileCheck -check-prefix=X64 %s 3 4 ; X86-NOT: and 5 6 ; X64-NOT: and 7 ; X64-NOT: movzbq 8 ; X64-NOT: movzwq 9 ; X64-NOT: movzlq 10 11 ; These should use movzbl instead of 'and 255'. 12 ; This related to not having a ZERO_EXTEND_REG opcode. 13 14 define i32 @a(i32 %d) nounwind { 15 %e = add i32 %d, 1 16 %retval = and i32 %e, 255 17 ret i32 %retval 18 } 19 define i32 @b(float %d) nounwind { 20 %tmp12 = fptoui float %d to i8 21 %retval = zext i8 %tmp12 to i32 22 ret i32 %retval 23 } 24 define i32 @c(i32 %d) nounwind { 25 %e = add i32 %d, 1 26 %retval = and i32 %e, 65535 27 ret i32 %retval 28 } 29 define i64 @d(i64 %d) nounwind { 30 %e = add i64 %d, 1 31 %retval = and i64 %e, 255 32 ret i64 %retval 33 } 34 define i64 @e(i64 %d) nounwind { 35 %e = add i64 %d, 1 36 %retval = and i64 %e, 65535 37 ret i64 %retval 38 } 39 define i64 @f(i64 %d) nounwind { 40 %e = add i64 %d, 1 41 %retval = and i64 %e, 4294967295 42 ret i64 %retval 43 } 44 45 define i32 @g(i8 %d) nounwind { 46 %e = add i8 %d, 1 47 %retval = zext i8 %e to i32 48 ret i32 %retval 49 } 50 define i32 @h(i16 %d) nounwind { 51 %e = add i16 %d, 1 52 %retval = zext i16 %e to i32 53 ret i32 %retval 54 } 55 define i64 @i(i8 %d) nounwind { 56 %e = add i8 %d, 1 57 %retval = zext i8 %e to i64 58 ret i64 %retval 59 } 60 define i64 @j(i16 %d) nounwind { 61 %e = add i16 %d, 1 62 %retval = zext i16 %e to i64 63 ret i64 %retval 64 } 65 define i64 @k(i32 %d) nounwind { 66 %e = add i32 %d, 1 67 %retval = zext i32 %e to i64 68 ret i64 %retval 69 } 70
