1 ; RUN: llc < %s -march=xcore | FileCheck %s 2 3 ; CHECK-LABEL: atomic_fence 4 ; CHECK: #MEMBARRIER 5 ; CHECK: #MEMBARRIER 6 ; CHECK: #MEMBARRIER 7 ; CHECK: #MEMBARRIER 8 ; CHECK: retsp 0 9 define void @atomic_fence() nounwind { 10 entry: 11 fence acquire 12 fence release 13 fence acq_rel 14 fence seq_cst 15 ret void 16 } 17 18 @pool = external global i64 19 20 define void @atomicloadstore() nounwind { 21 entry: 22 ; CHECK-LABEL: atomicloadstore 23 24 ; CHECK: ldw r[[R0:[0-9]+]], dp[pool] 25 ; CHECK-NEXT: ldaw r[[R1:[0-9]+]], dp[pool] 26 ; CHECK-NEXT: #MEMBARRIER 27 ; CHECK-NEXT: ldc r[[R2:[0-9]+]], 0 28 %0 = load atomic i32, i32* bitcast (i64* @pool to i32*) acquire, align 4 29 30 ; CHECK-NEXT: ld16s r3, r[[R1]][r[[R2]]] 31 ; CHECK-NEXT: #MEMBARRIER 32 %1 = load atomic i16, i16* bitcast (i64* @pool to i16*) acquire, align 2 33 34 ; CHECK-NEXT: ld8u r11, r[[R1]][r[[R2]]] 35 ; CHECK-NEXT: #MEMBARRIER 36 %2 = load atomic i8, i8* bitcast (i64* @pool to i8*) acquire, align 1 37 38 ; CHECK-NEXT: ldw r4, dp[pool] 39 ; CHECK-NEXT: #MEMBARRIER 40 %3 = load atomic i32, i32* bitcast (i64* @pool to i32*) seq_cst, align 4 41 42 ; CHECK-NEXT: ld16s r5, r[[R1]][r[[R2]]] 43 ; CHECK-NEXT: #MEMBARRIER 44 %4 = load atomic i16, i16* bitcast (i64* @pool to i16*) seq_cst, align 2 45 46 ; CHECK-NEXT: ld8u r6, r[[R1]][r[[R2]]] 47 ; CHECK-NEXT: #MEMBARRIER 48 %5 = load atomic i8, i8* bitcast (i64* @pool to i8*) seq_cst, align 1 49 50 ; CHECK-NEXT: #MEMBARRIER 51 ; CHECK-NEXT: stw r[[R0]], dp[pool] 52 store atomic i32 %0, i32* bitcast (i64* @pool to i32*) release, align 4 53 54 ; CHECK-NEXT: #MEMBARRIER 55 ; CHECK-NEXT: st16 r3, r[[R1]][r[[R2]]] 56 store atomic i16 %1, i16* bitcast (i64* @pool to i16*) release, align 2 57 58 ; CHECK-NEXT: #MEMBARRIER 59 ; CHECK-NEXT: st8 r11, r[[R1]][r[[R2]]] 60 store atomic i8 %2, i8* bitcast (i64* @pool to i8*) release, align 1 61 62 ; CHECK-NEXT: #MEMBARRIER 63 ; CHECK-NEXT: stw r4, dp[pool] 64 ; CHECK-NEXT: #MEMBARRIER 65 store atomic i32 %3, i32* bitcast (i64* @pool to i32*) seq_cst, align 4 66 67 ; CHECK-NEXT: #MEMBARRIER 68 ; CHECK-NEXT: st16 r5, r[[R1]][r[[R2]]] 69 ; CHECK-NEXT: #MEMBARRIER 70 store atomic i16 %4, i16* bitcast (i64* @pool to i16*) seq_cst, align 2 71 72 ; CHECK-NEXT: #MEMBARRIER 73 ; CHECK-NEXT: st8 r6, r[[R1]][r[[R2]]] 74 ; CHECK-NEXT: #MEMBARRIER 75 store atomic i8 %5, i8* bitcast (i64* @pool to i8*) seq_cst, align 1 76 77 ; CHECK-NEXT: ldw r[[R0]], dp[pool] 78 ; CHECK-NEXT: stw r[[R0]], dp[pool] 79 ; CHECK-NEXT: ld16s r[[R0]], r[[R1]][r[[R2]]] 80 ; CHECK-NEXT: st16 r[[R0]], r[[R1]][r[[R2]]] 81 ; CHECK-NEXT: ld8u r[[R0]], r[[R1]][r[[R2]]] 82 ; CHECK-NEXT: st8 r[[R0]], r[[R1]][r[[R2]]] 83 %6 = load atomic i32, i32* bitcast (i64* @pool to i32*) monotonic, align 4 84 store atomic i32 %6, i32* bitcast (i64* @pool to i32*) monotonic, align 4 85 %7 = load atomic i16, i16* bitcast (i64* @pool to i16*) monotonic, align 2 86 store atomic i16 %7, i16* bitcast (i64* @pool to i16*) monotonic, align 2 87 %8 = load atomic i8, i8* bitcast (i64* @pool to i8*) monotonic, align 1 88 store atomic i8 %8, i8* bitcast (i64* @pool to i8*) monotonic, align 1 89 90 ret void 91 } 92
