1 ; RUN: opt < %s -asan -S -o %t.ll 2 ; RUN: FileCheck %s < %t.ll 3 ; RUN: llc < %t.ll | FileCheck %s --check-prefix=ASM 4 5 target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-S32" 6 target triple = "i386-pc-windows-msvc" 7 8 define void @MyCPUID(i32 %fxn, i32* %out) sanitize_address { 9 %fxn.ptr = alloca i32 10 %a.ptr = alloca i32 11 %b.ptr = alloca i32 12 %c.ptr = alloca i32 13 %d.ptr = alloca i32 14 store i32 %fxn, i32* %fxn.ptr 15 call void asm sideeffect inteldialect "xchg ebx, esi\0A\09mov eax, dword ptr $4\0A\09cpuid\0A\09mov dword ptr $0, eax\0A\09mov dword ptr $1, ebx\0A\09mov dword ptr $2, ecx\0A\09mov dword ptr $3, edx\0A\09xchg ebx, esi", "=*m,=*m,=*m,=*m,*m,~{eax},~{ebx},~{ecx},~{edx},~{esi},~{dirflag},~{fpsr},~{flags}"(i32* %a.ptr, i32* %b.ptr, i32* %c.ptr, i32* %d.ptr, i32* %fxn.ptr) 16 17 %a = load i32, i32* %a.ptr 18 %a.out = getelementptr inbounds i32, i32* %out, i32 0 19 store i32 %a, i32* %a.out 20 21 %b = load i32, i32* %b.ptr 22 %b.out = getelementptr inbounds i32, i32* %out, i32 1 23 store i32 %b, i32* %b.out 24 25 %c = load i32, i32* %c.ptr 26 %c.out = getelementptr inbounds i32, i32* %out, i32 2 27 store i32 %c, i32* %c.out 28 29 %d = load i32, i32* %d.ptr 30 %d.out = getelementptr inbounds i32, i32* %out, i32 3 31 store i32 %d, i32* %d.out 32 33 ret void 34 } 35 36 ; We used to introduce stack mallocs for UAR detection, but that makes LLVM run 37 ; out of registers on 32-bit platforms. Therefore, we don't do stack malloc on 38 ; such functions. 39 40 ; CHECK-LABEL: define void @MyCPUID(i32 %fxn, i32* %out) 41 ; CHECK: %MyAlloca = alloca [96 x i8], align 32 42 ; CHECK-NOT: call {{.*}} @__asan_stack_malloc 43 44 ; The code generator should recognize that all operands are just stack memory. 45 ; This is important with MS inline asm where operand lists are implicit and all 46 ; local variables can be referenced freely. 47 48 ; ASM-LABEL: MyCPUID: 49 ; ASM: cpuid 50 ; ASM-NEXT: movl %eax, {{[0-9]+}}(%esp) 51 ; ASM-NEXT: movl %ebx, {{[0-9]+}}(%esp) 52 ; ASM-NEXT: movl %ecx, {{[0-9]+}}(%esp) 53 ; ASM-NEXT: movl %edx, {{[0-9]+}}(%esp) 54
