1 ; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1 -force-vector-interleave=2 -loop-vectorize -simplifycfg < %s | FileCheck %s --check-prefix=UNROLL 2 ; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1 -force-vector-interleave=2 -loop-vectorize < %s | FileCheck %s --check-prefix=UNROLL-NOSIMPLIFY 3 ; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=2 -force-vector-interleave=1 -loop-vectorize -enable-cond-stores-vec -simplifycfg < %s | FileCheck %s --check-prefix=VEC 4 ; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=2 -force-vector-interleave=1 -loop-vectorize -enable-cond-stores-vec -simplifycfg -instcombine < %s | FileCheck %s --check-prefix=VEC-IC 5 6 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" 7 target triple = "x86_64-apple-macosx10.9.0" 8 9 ; Test predication of stores. 10 define i32 @test(i32* nocapture %f) #0 { 11 entry: 12 br label %for.body 13 14 ; VEC-LABEL: test 15 ; VEC: %[[v8:.+]] = icmp sgt <2 x i32> %{{.*}}, <i32 100, i32 100> 16 ; VEC: %[[v9:.+]] = add nsw <2 x i32> %{{.*}}, <i32 20, i32 20> 17 ; VEC: %[[v10:.+]] = and <2 x i1> %[[v8]], <i1 true, i1 true> 18 ; VEC: %[[v11:.+]] = extractelement <2 x i1> %[[v10]], i32 0 19 ; VEC: %[[v12:.+]] = icmp eq i1 %[[v11]], true 20 ; VEC: %[[v13:.+]] = extractelement <2 x i32> %[[v9]], i32 0 21 ; VEC: %[[v14:.+]] = extractelement <2 x i32*> %{{.*}}, i32 0 22 ; VEC: br i1 %[[v12]], label %[[cond:.+]], label %[[else:.+]] 23 ; 24 ; VEC: [[cond]]: 25 ; VEC: store i32 %[[v13]], i32* %[[v14]], align 4 26 ; VEC: br label %[[else:.+]] 27 ; 28 ; VEC: [[else]]: 29 ; VEC: %[[v15:.+]] = extractelement <2 x i1> %[[v10]], i32 1 30 ; VEC: %[[v16:.+]] = icmp eq i1 %[[v15]], true 31 ; VEC: %[[v17:.+]] = extractelement <2 x i32> %[[v9]], i32 1 32 ; VEC: %[[v18:.+]] = extractelement <2 x i32*> %{{.+}} i32 1 33 ; VEC: br i1 %[[v16]], label %[[cond2:.+]], label %[[else2:.+]] 34 ; 35 ; VEC: [[cond2]]: 36 ; VEC: store i32 %[[v17]], i32* %[[v18]], align 4 37 ; VEC: br label %[[else2:.+]] 38 ; 39 ; VEC: [[else2]]: 40 41 ; VEC-IC-LABEL: test 42 ; VEC-IC: %[[v1:.+]] = icmp sgt <2 x i32> %{{.*}}, <i32 100, i32 100> 43 ; VEC-IC: %[[v2:.+]] = add nsw <2 x i32> %{{.*}}, <i32 20, i32 20> 44 ; VEC-IC: %[[v3:.+]] = extractelement <2 x i1> %[[v1]], i32 0 45 ; VEC-IC: br i1 %[[v3]], label %[[cond:.+]], label %[[else:.+]] 46 ; 47 ; VEC-IC: [[cond]]: 48 ; VEC-IC: %[[v4:.+]] = extractelement <2 x i32> %[[v2]], i32 0 49 ; VEC-IC: store i32 %[[v4]], i32* %{{.*}}, align 4 50 ; VEC-IC: br label %[[else:.+]] 51 ; 52 ; VEC-IC: [[else]]: 53 ; VEC-IC: %[[v5:.+]] = extractelement <2 x i1> %[[v1]], i32 1 54 ; VEC-IC: br i1 %[[v5]], label %[[cond2:.+]], label %[[else2:.+]] 55 ; 56 ; VEC-IC: [[cond2]]: 57 ; VEC-IC: %[[v6:.+]] = extractelement <2 x i32> %[[v2]], i32 1 58 ; VEC-IC: store i32 %[[v6]], i32* %{{.*}}, align 4 59 ; VEC-IC: br label %[[else2:.+]] 60 ; 61 ; VEC-IC: [[else2]]: 62 63 ; UNROLL-LABEL: test 64 ; UNROLL: vector.body: 65 ; UNROLL: %[[IND:[a-zA-Z0-9]+]] = add i64 %{{.*}}, 0 66 ; UNROLL: %[[IND1:[a-zA-Z0-9]+]] = add i64 %{{.*}}, 1 67 ; UNROLL: %[[v0:[a-zA-Z0-9]+]] = getelementptr inbounds i32, i32* %f, i64 %[[IND]] 68 ; UNROLL: %[[v1:[a-zA-Z0-9]+]] = getelementptr inbounds i32, i32* %f, i64 %[[IND1]] 69 ; UNROLL: %[[v2:[a-zA-Z0-9]+]] = load i32, i32* %[[v0]], align 4 70 ; UNROLL: %[[v3:[a-zA-Z0-9]+]] = load i32, i32* %[[v1]], align 4 71 ; UNROLL: %[[v4:[a-zA-Z0-9]+]] = icmp sgt i32 %[[v2]], 100 72 ; UNROLL: %[[v5:[a-zA-Z0-9]+]] = icmp sgt i32 %[[v3]], 100 73 ; UNROLL: %[[v6:[a-zA-Z0-9]+]] = add nsw i32 %[[v2]], 20 74 ; UNROLL: %[[v7:[a-zA-Z0-9]+]] = add nsw i32 %[[v3]], 20 75 ; UNROLL: %[[v8:[a-zA-Z0-9]+]] = icmp eq i1 %[[v4]], true 76 ; UNROLL: br i1 %[[v8]], label %[[cond:[a-zA-Z0-9.]+]], label %[[else:[a-zA-Z0-9.]+]] 77 ; 78 ; UNROLL: [[cond]]: 79 ; UNROLL: store i32 %[[v6]], i32* %[[v0]], align 4 80 ; UNROLL: br label %[[else]] 81 ; 82 ; UNROLL: [[else]]: 83 ; UNROLL: %[[v9:[a-zA-Z0-9]+]] = icmp eq i1 %[[v5]], true 84 ; UNROLL: br i1 %[[v9]], label %[[cond2:[a-zA-Z0-9.]+]], label %[[else2:[a-zA-Z0-9.]+]] 85 ; 86 ; UNROLL: [[cond2]]: 87 ; UNROLL: store i32 %[[v7]], i32* %[[v1]], align 4 88 ; UNROLL: br label %[[else2]] 89 ; 90 ; UNROLL: [[else2]]: 91 92 for.body: 93 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.inc ] 94 %arrayidx = getelementptr inbounds i32, i32* %f, i64 %indvars.iv 95 %0 = load i32, i32* %arrayidx, align 4 96 %cmp1 = icmp sgt i32 %0, 100 97 br i1 %cmp1, label %if.then, label %for.inc 98 99 if.then: 100 %add = add nsw i32 %0, 20 101 store i32 %add, i32* %arrayidx, align 4 102 br label %for.inc 103 104 for.inc: 105 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 106 %exitcond = icmp eq i64 %indvars.iv.next, 128 107 br i1 %exitcond, label %for.end, label %for.body 108 109 for.end: 110 ret i32 0 111 } 112 113 ; Track basic blocks when unrolling conditional blocks. This code used to assert 114 ; because we did not update the phi nodes with the proper predecessor in the 115 ; vectorized loop body. 116 ; PR18724 117 118 ; UNROLL-NOSIMPLIFY-LABEL: bug18724 119 ; UNROLL-NOSIMPLIFY: store i32 120 ; UNROLL-NOSIMPLIFY: store i32 121 122 define void @bug18724() { 123 entry: 124 br label %for.body9 125 126 for.body9: 127 br i1 undef, label %for.inc26, label %for.body14 128 129 for.body14: 130 %indvars.iv3 = phi i64 [ %indvars.iv.next4, %for.inc23 ], [ undef, %for.body9 ] 131 %iNewChunks.120 = phi i32 [ %iNewChunks.2, %for.inc23 ], [ undef, %for.body9 ] 132 %arrayidx16 = getelementptr inbounds [768 x i32], [768 x i32]* undef, i64 0, i64 %indvars.iv3 133 %tmp = load i32, i32* %arrayidx16, align 4 134 br i1 undef, label %if.then18, label %for.inc23 135 136 if.then18: 137 store i32 2, i32* %arrayidx16, align 4 138 %inc21 = add nsw i32 %iNewChunks.120, 1 139 br label %for.inc23 140 141 for.inc23: 142 %iNewChunks.2 = phi i32 [ %inc21, %if.then18 ], [ %iNewChunks.120, %for.body14 ] 143 %indvars.iv.next4 = add nsw i64 %indvars.iv3, 1 144 %tmp1 = trunc i64 %indvars.iv3 to i32 145 %cmp13 = icmp slt i32 %tmp1, 0 146 br i1 %cmp13, label %for.body14, label %for.inc26 147 148 for.inc26: 149 %iNewChunks.1.lcssa = phi i32 [ undef, %for.body9 ], [ %iNewChunks.2, %for.inc23 ] 150 unreachable 151 } 152
