1 //===- X86DisassemblerShared.h - Emitter shared header ----------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #ifndef LLVM_UTILS_TABLEGEN_X86DISASSEMBLERSHARED_H 11 #define LLVM_UTILS_TABLEGEN_X86DISASSEMBLERSHARED_H 12 13 #include <cstring> 14 #include <string> 15 16 #include "../../lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h" 17 18 struct InstructionSpecifier { 19 llvm::X86Disassembler::OperandSpecifier 20 operands[llvm::X86Disassembler::X86_MAX_OPERANDS]; 21 llvm::X86Disassembler::InstructionContext insnContext; 22 std::string name; 23 24 InstructionSpecifier() { 25 insnContext = llvm::X86Disassembler::IC; 26 name = ""; 27 memset(operands, 0, sizeof(operands)); 28 } 29 }; 30 31 /// Specifies whether a ModR/M byte is needed and (if so) which 32 /// instruction each possible value of the ModR/M byte corresponds to. Once 33 /// this information is known, we have narrowed down to a single instruction. 34 struct ModRMDecision { 35 uint8_t modrm_type; 36 llvm::X86Disassembler::InstrUID instructionIDs[256]; 37 }; 38 39 /// Specifies which set of ModR/M->instruction tables to look at 40 /// given a particular opcode. 41 struct OpcodeDecision { 42 ModRMDecision modRMDecisions[256]; 43 }; 44 45 /// Specifies which opcode->instruction tables to look at given 46 /// a particular context (set of attributes). Since there are many possible 47 /// contexts, the decoder first uses CONTEXTS_SYM to determine which context 48 /// applies given a specific set of attributes. Hence there are only IC_max 49 /// entries in this table, rather than 2^(ATTR_max). 50 struct ContextDecision { 51 OpcodeDecision opcodeDecisions[llvm::X86Disassembler::IC_max]; 52 }; 53 54 #endif 55
