1 /* 2 * Copyright 2009 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric (at) anholt.net> 25 * 26 */ 27 28 #include "brw_context.h" 29 #include "brw_state.h" 30 #include "brw_defines.h" 31 #include "intel_batchbuffer.h" 32 #include "main/fbobject.h" 33 34 static void 35 gen6_upload_scissor_state(struct brw_context *brw) 36 { 37 struct intel_context *intel = &brw->intel; 38 struct gl_context *ctx = &intel->ctx; 39 const bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer); 40 struct gen6_scissor_rect *scissor; 41 uint32_t scissor_state_offset; 42 43 scissor = brw_state_batch(brw, AUB_TRACE_SCISSOR_STATE, 44 sizeof(*scissor), 32, &scissor_state_offset); 45 46 /* _NEW_SCISSOR | _NEW_BUFFERS | _NEW_VIEWPORT */ 47 48 /* The scissor only needs to handle the intersection of drawable and 49 * scissor rect. Clipping to the boundaries of static shared buffers 50 * for front/back/depth is covered by looping over cliprects in brw_draw.c. 51 * 52 * Note that the hardware's coordinates are inclusive, while Mesa's min is 53 * inclusive but max is exclusive. 54 */ 55 if (ctx->DrawBuffer->_Xmin == ctx->DrawBuffer->_Xmax || 56 ctx->DrawBuffer->_Ymin == ctx->DrawBuffer->_Ymax) { 57 /* If the scissor was out of bounds and got clamped to 0 58 * width/height at the bounds, the subtraction of 1 from 59 * maximums could produce a negative number and thus not clip 60 * anything. Instead, just provide a min > max scissor inside 61 * the bounds, which produces the expected no rendering. 62 */ 63 scissor->xmin = 1; 64 scissor->xmax = 0; 65 scissor->ymin = 1; 66 scissor->ymax = 0; 67 } else if (render_to_fbo) { 68 /* texmemory: Y=0=bottom */ 69 scissor->xmin = ctx->DrawBuffer->_Xmin; 70 scissor->xmax = ctx->DrawBuffer->_Xmax - 1; 71 scissor->ymin = ctx->DrawBuffer->_Ymin; 72 scissor->ymax = ctx->DrawBuffer->_Ymax - 1; 73 } 74 else { 75 /* memory: Y=0=top */ 76 scissor->xmin = ctx->DrawBuffer->_Xmin; 77 scissor->xmax = ctx->DrawBuffer->_Xmax - 1; 78 scissor->ymin = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymax; 79 scissor->ymax = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymin - 1; 80 } 81 82 BEGIN_BATCH(2); 83 OUT_BATCH(_3DSTATE_SCISSOR_STATE_POINTERS << 16 | (2 - 2)); 84 OUT_BATCH(scissor_state_offset); 85 ADVANCE_BATCH(); 86 } 87 88 const struct brw_tracked_state gen6_scissor_state = { 89 .dirty = { 90 .mesa = _NEW_SCISSOR | _NEW_BUFFERS | _NEW_VIEWPORT, 91 .brw = BRW_NEW_BATCH, 92 .cache = 0, 93 }, 94 .emit = gen6_upload_scissor_state, 95 }; 96
