1 // Copyright 2014 the V8 project authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style license that can be 3 // found in the LICENSE file. 4 5 #ifndef V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ 6 #define V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ 7 8 namespace v8 { 9 namespace internal { 10 namespace compiler { 11 12 // PPC-specific opcodes that specify which assembly sequence to emit. 13 // Most opcodes specify a single instruction. 14 #define TARGET_ARCH_OPCODE_LIST(V) \ 15 V(PPC_And) \ 16 V(PPC_AndComplement) \ 17 V(PPC_Or) \ 18 V(PPC_OrComplement) \ 19 V(PPC_Xor) \ 20 V(PPC_ShiftLeft32) \ 21 V(PPC_ShiftLeft64) \ 22 V(PPC_ShiftRight32) \ 23 V(PPC_ShiftRight64) \ 24 V(PPC_ShiftRightAlg32) \ 25 V(PPC_ShiftRightAlg64) \ 26 V(PPC_RotRight32) \ 27 V(PPC_RotRight64) \ 28 V(PPC_Not) \ 29 V(PPC_RotLeftAndMask32) \ 30 V(PPC_RotLeftAndClear64) \ 31 V(PPC_RotLeftAndClearLeft64) \ 32 V(PPC_RotLeftAndClearRight64) \ 33 V(PPC_Add) \ 34 V(PPC_AddWithOverflow32) \ 35 V(PPC_AddDouble) \ 36 V(PPC_Sub) \ 37 V(PPC_SubWithOverflow32) \ 38 V(PPC_SubDouble) \ 39 V(PPC_Mul32) \ 40 V(PPC_Mul64) \ 41 V(PPC_MulHigh32) \ 42 V(PPC_MulHighU32) \ 43 V(PPC_MulDouble) \ 44 V(PPC_Div32) \ 45 V(PPC_Div64) \ 46 V(PPC_DivU32) \ 47 V(PPC_DivU64) \ 48 V(PPC_DivDouble) \ 49 V(PPC_Mod32) \ 50 V(PPC_Mod64) \ 51 V(PPC_ModU32) \ 52 V(PPC_ModU64) \ 53 V(PPC_ModDouble) \ 54 V(PPC_Neg) \ 55 V(PPC_NegDouble) \ 56 V(PPC_SqrtDouble) \ 57 V(PPC_FloorDouble) \ 58 V(PPC_CeilDouble) \ 59 V(PPC_TruncateDouble) \ 60 V(PPC_RoundDouble) \ 61 V(PPC_MaxDouble) \ 62 V(PPC_MinDouble) \ 63 V(PPC_AbsDouble) \ 64 V(PPC_Cntlz32) \ 65 V(PPC_Cntlz64) \ 66 V(PPC_Popcnt32) \ 67 V(PPC_Popcnt64) \ 68 V(PPC_Cmp32) \ 69 V(PPC_Cmp64) \ 70 V(PPC_CmpDouble) \ 71 V(PPC_Tst32) \ 72 V(PPC_Tst64) \ 73 V(PPC_Push) \ 74 V(PPC_PushFrame) \ 75 V(PPC_StoreToStackSlot) \ 76 V(PPC_ExtendSignWord8) \ 77 V(PPC_ExtendSignWord16) \ 78 V(PPC_ExtendSignWord32) \ 79 V(PPC_Uint32ToUint64) \ 80 V(PPC_Int64ToInt32) \ 81 V(PPC_Int64ToFloat32) \ 82 V(PPC_Int64ToDouble) \ 83 V(PPC_Uint64ToFloat32) \ 84 V(PPC_Uint64ToDouble) \ 85 V(PPC_Int32ToDouble) \ 86 V(PPC_Uint32ToDouble) \ 87 V(PPC_Float32ToDouble) \ 88 V(PPC_DoubleToInt32) \ 89 V(PPC_DoubleToUint32) \ 90 V(PPC_DoubleToInt64) \ 91 V(PPC_DoubleToUint64) \ 92 V(PPC_DoubleToFloat32) \ 93 V(PPC_DoubleExtractLowWord32) \ 94 V(PPC_DoubleExtractHighWord32) \ 95 V(PPC_DoubleInsertLowWord32) \ 96 V(PPC_DoubleInsertHighWord32) \ 97 V(PPC_DoubleConstruct) \ 98 V(PPC_BitcastInt32ToFloat32) \ 99 V(PPC_BitcastFloat32ToInt32) \ 100 V(PPC_BitcastInt64ToDouble) \ 101 V(PPC_BitcastDoubleToInt64) \ 102 V(PPC_LoadWordS8) \ 103 V(PPC_LoadWordU8) \ 104 V(PPC_LoadWordS16) \ 105 V(PPC_LoadWordU16) \ 106 V(PPC_LoadWordS32) \ 107 V(PPC_LoadWord64) \ 108 V(PPC_LoadFloat32) \ 109 V(PPC_LoadDouble) \ 110 V(PPC_StoreWord8) \ 111 V(PPC_StoreWord16) \ 112 V(PPC_StoreWord32) \ 113 V(PPC_StoreWord64) \ 114 V(PPC_StoreFloat32) \ 115 V(PPC_StoreDouble) 116 117 118 // Addressing modes represent the "shape" of inputs to an instruction. 119 // Many instructions support multiple addressing modes. Addressing modes 120 // are encoded into the InstructionCode of the instruction and tell the 121 // code generator after register allocation which assembler method to call. 122 // 123 // We use the following local notation for addressing modes: 124 // 125 // R = register 126 // O = register or stack slot 127 // D = double register 128 // I = immediate (handle, external, int32) 129 // MRI = [register + immediate] 130 // MRR = [register + register] 131 #define TARGET_ADDRESSING_MODE_LIST(V) \ 132 V(MRI) /* [%r0 + K] */ \ 133 V(MRR) /* [%r0 + %r1] */ 134 135 } // namespace compiler 136 } // namespace internal 137 } // namespace v8 138 139 #endif // V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_ 140
