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      1 // Copyright 2015, ARM Limited
      2 // All rights reserved.
      3 //
      4 // Redistribution and use in source and binary forms, with or without
      5 // modification, are permitted provided that the following conditions are met:
      6 //
      7 //   * Redistributions of source code must retain the above copyright notice,
      8 //     this list of conditions and the following disclaimer.
      9 //   * Redistributions in binary form must reproduce the above copyright notice,
     10 //     this list of conditions and the following disclaimer in the documentation
     11 //     and/or other materials provided with the distribution.
     12 //   * Neither the name of ARM Limited nor the names of its contributors may be
     13 //     used to endorse or promote products derived from this software without
     14 //     specific prior written permission.
     15 //
     16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
     17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
     20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
     23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     26 
     27 
     28 // ---------------------------------------------------------------------
     29 // This file is auto generated using tools/generate_simulator_traces.py.
     30 //
     31 // PLEASE DO NOT EDIT.
     32 // ---------------------------------------------------------------------
     33 
     34 #ifndef VIXL_SIM_DUP_H_2OPIMM_TRACE_A64_H_
     35 #define VIXL_SIM_DUP_H_2OPIMM_TRACE_A64_H_
     36 
     37 const uint16_t kExpected_NEON_dup_H_2OPIMM[] = {
     38   0xff81,
     39   0xff82,
     40   0xff83,
     41   0xfff0,
     42   0xfffd,
     43   0xfffe,
     44   0xffff,
     45   0x0000,
     46   0xff82,
     47   0xff83,
     48   0xfff0,
     49   0xfffd,
     50   0xfffe,
     51   0xffff,
     52   0x0000,
     53   0x0001,
     54   0xff83,
     55   0xfff0,
     56   0xfffd,
     57   0xfffe,
     58   0xffff,
     59   0x0000,
     60   0x0001,
     61   0x0002,
     62   0xfff0,
     63   0xfffd,
     64   0xfffe,
     65   0xffff,
     66   0x0000,
     67   0x0001,
     68   0x0002,
     69   0x0010,
     70   0xfffd,
     71   0xfffe,
     72   0xffff,
     73   0x0000,
     74   0x0001,
     75   0x0002,
     76   0x0010,
     77   0x007d,
     78   0xfffe,
     79   0xffff,
     80   0x0000,
     81   0x0001,
     82   0x0002,
     83   0x0010,
     84   0x007d,
     85   0x007e,
     86   0xffff,
     87   0x0000,
     88   0x0001,
     89   0x0002,
     90   0x0010,
     91   0x007d,
     92   0x007e,
     93   0x007f,
     94   0x0000,
     95   0x0001,
     96   0x0002,
     97   0x0010,
     98   0x007d,
     99   0x007e,
    100   0x007f,
    101   0x3333,
    102   0x0001,
    103   0x0002,
    104   0x0010,
    105   0x007d,
    106   0x007e,
    107   0x007f,
    108   0x3333,
    109   0x5555,
    110   0x0002,
    111   0x0010,
    112   0x007d,
    113   0x007e,
    114   0x007f,
    115   0x3333,
    116   0x5555,
    117   0x7ffd,
    118   0x0010,
    119   0x007d,
    120   0x007e,
    121   0x007f,
    122   0x3333,
    123   0x5555,
    124   0x7ffd,
    125   0x7ffe,
    126   0x007d,
    127   0x007e,
    128   0x007f,
    129   0x3333,
    130   0x5555,
    131   0x7ffd,
    132   0x7ffe,
    133   0x7fff,
    134   0x007e,
    135   0x007f,
    136   0x3333,
    137   0x5555,
    138   0x7ffd,
    139   0x7ffe,
    140   0x7fff,
    141   0x8000,
    142   0x007f,
    143   0x3333,
    144   0x5555,
    145   0x7ffd,
    146   0x7ffe,
    147   0x7fff,
    148   0x8000,
    149   0x8001,
    150   0x3333,
    151   0x5555,
    152   0x7ffd,
    153   0x7ffe,
    154   0x7fff,
    155   0x8000,
    156   0x8001,
    157   0xaaaa,
    158   0x5555,
    159   0x7ffd,
    160   0x7ffe,
    161   0x7fff,
    162   0x8000,
    163   0x8001,
    164   0xaaaa,
    165   0xcccc,
    166   0x7ffd,
    167   0x7ffe,
    168   0x7fff,
    169   0x8000,
    170   0x8001,
    171   0xaaaa,
    172   0xcccc,
    173   0xff80,
    174   0x7ffe,
    175   0x7fff,
    176   0x8000,
    177   0x8001,
    178   0xaaaa,
    179   0xcccc,
    180   0xff80,
    181   0xff81,
    182   0x7fff,
    183   0x8000,
    184   0x8001,
    185   0xaaaa,
    186   0xcccc,
    187   0xff80,
    188   0xff81,
    189   0xff82,
    190   0x8000,
    191   0x8001,
    192   0xaaaa,
    193   0xcccc,
    194   0xff80,
    195   0xff81,
    196   0xff82,
    197   0xff83,
    198   0x8001,
    199   0xaaaa,
    200   0xcccc,
    201   0xff80,
    202   0xff81,
    203   0xff82,
    204   0xff83,
    205   0xfff0,
    206   0xaaaa,
    207   0xcccc,
    208   0xff80,
    209   0xff81,
    210   0xff82,
    211   0xff83,
    212   0xfff0,
    213   0xfffd,
    214   0xcccc,
    215   0xff80,
    216   0xff81,
    217   0xff82,
    218   0xff83,
    219   0xfff0,
    220   0xfffd,
    221   0xfffe,
    222   0xff80,
    223   0xff81,
    224   0xff82,
    225   0xff83,
    226   0xfff0,
    227   0xfffd,
    228   0xfffe,
    229   0xffff,
    230 };
    231 const unsigned kExpectedCount_NEON_dup_H_2OPIMM = 192;
    232 
    233 #endif  // VIXL_SIM_DUP_H_2OPIMM_TRACE_A64_H_
    234