1 // Copyright 2014 The Go Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style 3 // license that can be found in the LICENSE file. 4 5 package arm64 6 7 import ( 8 "cmd/compile/internal/gc" 9 "cmd/internal/obj" 10 "cmd/internal/obj/arm64" 11 ) 12 13 const ( 14 LeftRdwr uint32 = gc.LeftRead | gc.LeftWrite 15 RightRdwr uint32 = gc.RightRead | gc.RightWrite 16 ) 17 18 // This table gives the basic information about instruction 19 // generated by the compiler and processed in the optimizer. 20 // See opt.h for bit definitions. 21 // 22 // Instructions not generated need not be listed. 23 // As an exception to that rule, we typically write down all the 24 // size variants of an operation even if we just use a subset. 25 // 26 // The table is formatted for 8-space tabs. 27 var progtable = [arm64.ALAST]obj.ProgInfo{ 28 obj.ATYPE: {gc.Pseudo | gc.Skip, 0, 0, 0}, 29 obj.ATEXT: {gc.Pseudo, 0, 0, 0}, 30 obj.AFUNCDATA: {gc.Pseudo, 0, 0, 0}, 31 obj.APCDATA: {gc.Pseudo, 0, 0, 0}, 32 obj.AUNDEF: {gc.Break, 0, 0, 0}, 33 obj.AUSEFIELD: {gc.OK, 0, 0, 0}, 34 obj.ACHECKNIL: {gc.LeftRead, 0, 0, 0}, 35 obj.AVARDEF: {gc.Pseudo | gc.RightWrite, 0, 0, 0}, 36 obj.AVARKILL: {gc.Pseudo | gc.RightWrite, 0, 0, 0}, 37 38 // NOP is an internal no-op that also stands 39 // for USED and SET annotations, not the Power opcode. 40 obj.ANOP: {gc.LeftRead | gc.RightWrite, 0, 0, 0}, 41 arm64.AHINT: {gc.OK, 0, 0, 0}, 42 43 // Integer 44 arm64.AADD: {gc.SizeQ | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 45 arm64.ASUB: {gc.SizeQ | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 46 arm64.ANEG: {gc.SizeQ | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 47 arm64.AAND: {gc.SizeQ | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 48 arm64.AORR: {gc.SizeQ | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 49 arm64.AEOR: {gc.SizeQ | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 50 arm64.AMUL: {gc.SizeQ | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 51 arm64.ASMULL: {gc.SizeQ | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 52 arm64.AUMULL: {gc.SizeQ | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 53 arm64.ASMULH: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 54 arm64.AUMULH: {gc.SizeL | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 55 arm64.ASDIV: {gc.SizeQ | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 56 arm64.AUDIV: {gc.SizeQ | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 57 arm64.ALSL: {gc.SizeQ | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 58 arm64.ALSR: {gc.SizeQ | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 59 arm64.AASR: {gc.SizeQ | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 60 arm64.ACMP: {gc.SizeQ | gc.LeftRead | gc.RegRead, 0, 0, 0}, 61 62 // Floating point. 63 arm64.AFADDD: {gc.SizeD | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 64 arm64.AFADDS: {gc.SizeF | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 65 arm64.AFSUBD: {gc.SizeD | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 66 arm64.AFSUBS: {gc.SizeF | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 67 arm64.AFNEGD: {gc.SizeD | gc.LeftRead | gc.RightWrite, 0, 0, 0}, 68 arm64.AFNEGS: {gc.SizeF | gc.LeftRead | gc.RightWrite, 0, 0, 0}, 69 arm64.AFSQRTD: {gc.SizeD | gc.LeftRead | gc.RightWrite, 0, 0, 0}, 70 arm64.AFMULD: {gc.SizeD | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 71 arm64.AFMULS: {gc.SizeF | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 72 arm64.AFDIVD: {gc.SizeD | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 73 arm64.AFDIVS: {gc.SizeF | gc.LeftRead | gc.RegRead | gc.RightWrite, 0, 0, 0}, 74 arm64.AFCMPD: {gc.SizeD | gc.LeftRead | gc.RegRead, 0, 0, 0}, 75 arm64.AFCMPS: {gc.SizeF | gc.LeftRead | gc.RegRead, 0, 0, 0}, 76 77 // float -> integer 78 arm64.AFCVTZSD: {gc.SizeD | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 79 arm64.AFCVTZSS: {gc.SizeF | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 80 arm64.AFCVTZSDW: {gc.SizeD | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 81 arm64.AFCVTZSSW: {gc.SizeF | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 82 arm64.AFCVTZUD: {gc.SizeD | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 83 arm64.AFCVTZUS: {gc.SizeF | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 84 arm64.AFCVTZUDW: {gc.SizeD | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 85 arm64.AFCVTZUSW: {gc.SizeF | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 86 87 // float -> float 88 arm64.AFCVTSD: {gc.SizeD | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 89 arm64.AFCVTDS: {gc.SizeD | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 90 91 // integer -> float 92 arm64.ASCVTFD: {gc.SizeQ | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 93 arm64.ASCVTFS: {gc.SizeQ | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 94 arm64.ASCVTFWD: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 95 arm64.ASCVTFWS: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 96 arm64.AUCVTFD: {gc.SizeQ | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 97 arm64.AUCVTFS: {gc.SizeQ | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 98 arm64.AUCVTFWD: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 99 arm64.AUCVTFWS: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Conv, 0, 0, 0}, 100 101 // Moves 102 arm64.AMOVB: {gc.SizeB | gc.LeftRead | gc.RightWrite | gc.Move | gc.Conv, 0, 0, 0}, 103 arm64.AMOVBU: {gc.SizeB | gc.LeftRead | gc.RightWrite | gc.Move | gc.Conv, 0, 0, 0}, 104 arm64.AMOVH: {gc.SizeW | gc.LeftRead | gc.RightWrite | gc.Move | gc.Conv, 0, 0, 0}, 105 arm64.AMOVHU: {gc.SizeW | gc.LeftRead | gc.RightWrite | gc.Move | gc.Conv, 0, 0, 0}, 106 arm64.AMOVW: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Move | gc.Conv, 0, 0, 0}, 107 arm64.AMOVWU: {gc.SizeL | gc.LeftRead | gc.RightWrite | gc.Move | gc.Conv, 0, 0, 0}, 108 arm64.AMOVD: {gc.SizeQ | gc.LeftRead | gc.RightWrite | gc.Move, 0, 0, 0}, 109 arm64.AFMOVS: {gc.SizeF | gc.LeftRead | gc.RightWrite | gc.Move | gc.Conv, 0, 0, 0}, 110 arm64.AFMOVD: {gc.SizeD | gc.LeftRead | gc.RightWrite | gc.Move, 0, 0, 0}, 111 112 // Jumps 113 arm64.AB: {gc.Jump | gc.Break, 0, 0, 0}, 114 arm64.ABL: {gc.Call, 0, 0, 0}, 115 arm64.ABEQ: {gc.Cjmp, 0, 0, 0}, 116 arm64.ABNE: {gc.Cjmp, 0, 0, 0}, 117 arm64.ABGE: {gc.Cjmp, 0, 0, 0}, 118 arm64.ABLT: {gc.Cjmp, 0, 0, 0}, 119 arm64.ABGT: {gc.Cjmp, 0, 0, 0}, 120 arm64.ABLE: {gc.Cjmp, 0, 0, 0}, 121 arm64.ABLO: {gc.Cjmp, 0, 0, 0}, 122 arm64.ABLS: {gc.Cjmp, 0, 0, 0}, 123 arm64.ABHI: {gc.Cjmp, 0, 0, 0}, 124 arm64.ABHS: {gc.Cjmp, 0, 0, 0}, 125 arm64.ACBZ: {gc.Cjmp, 0, 0, 0}, 126 arm64.ACBNZ: {gc.Cjmp, 0, 0, 0}, 127 obj.ARET: {gc.Break, 0, 0, 0}, 128 obj.ADUFFZERO: {gc.Call, 0, 0, 0}, 129 obj.ADUFFCOPY: {gc.Call, 0, 0, 0}, 130 } 131 132 func proginfo(p *obj.Prog) { 133 info := &p.Info 134 *info = progtable[p.As] 135 if info.Flags == 0 { 136 gc.Fatal("proginfo: unknown instruction %v", p) 137 } 138 139 if (info.Flags&gc.RegRead != 0) && p.Reg == 0 { 140 info.Flags &^= gc.RegRead 141 info.Flags |= gc.RightRead /*CanRegRead |*/ 142 } 143 144 if (p.From.Type == obj.TYPE_MEM || p.From.Type == obj.TYPE_ADDR) && p.From.Reg != 0 { 145 info.Regindex |= RtoB(int(p.From.Reg)) 146 if p.Scond != 0 { 147 info.Regset |= RtoB(int(p.From.Reg)) 148 } 149 } 150 151 if (p.To.Type == obj.TYPE_MEM || p.To.Type == obj.TYPE_ADDR) && p.To.Reg != 0 { 152 info.Regindex |= RtoB(int(p.To.Reg)) 153 if p.Scond != 0 { 154 info.Regset |= RtoB(int(p.To.Reg)) 155 } 156 } 157 158 if p.From.Type == obj.TYPE_ADDR && p.From.Sym != nil && (info.Flags&gc.LeftRead != 0) { 159 info.Flags &^= gc.LeftRead 160 info.Flags |= gc.LeftAddr 161 } 162 163 if p.As == obj.ADUFFZERO { 164 info.Reguse |= RtoB(arm64.REGRT1) 165 info.Regset |= RtoB(arm64.REGRT1) 166 } 167 168 if p.As == obj.ADUFFCOPY { 169 // TODO(austin) Revisit when duffcopy is implemented 170 info.Reguse |= RtoB(arm64.REGRT1) | RtoB(arm64.REGRT2) | RtoB(arm64.REG_R5) 171 172 info.Regset |= RtoB(arm64.REGRT1) | RtoB(arm64.REGRT2) 173 } 174 } 175
