Lines Matching defs:RegisterVT
268 MVT RegisterVT;
272 NumIntermediates, RegisterVT);
275 assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");
276 assert(RegisterVT.getSizeInBits() ==
552 MVT RegisterVT;
556 NumIntermediates, RegisterVT);
561 assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");
607 MVT RegisterVT = TLI.getRegisterType(Context, ValueVT);
610 RegVTs.push_back(RegisterVT);
637 MVT RegisterVT = RegVTs[Value];
643 P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT);
645 P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT, *Flag);
655 !RegisterVT.isInteger() || RegisterVT.isVector())
663 unsigned RegSize = RegisterVT.getSizeInBits();
671 Parts[i] = DAG.getConstant(0, dl, RegisterVT);
701 RegisterVT, P, DAG.getValueType(FromVT));
705 NumRegs, RegisterVT, ValueVT, V);
729 MVT RegisterVT = RegVTs[Value];
731 if (ExtendKind == ISD::ANY_EXTEND && TLI.isZExtFree(Val, RegisterVT))
735 &Parts[Part], NumParts, RegisterVT, V, ExtendKind);
799 MVT RegisterVT = RegVTs[Value];
803 Ops.push_back(DAG.getRegister(TheReg, RegisterVT));
7034 MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), VT);
7038 MyFlags.VT = RegisterVT;
7230 MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), VT);
7234 NumRegs, RegisterVT, VT, nullptr,
7319 MVT RegisterVT = TLI->getRegisterType(*DAG.getContext(), ValueVTs[0]);
7320 ISD::InputArg RetArg(Flags, RegisterVT, ValueVTs[0], true,
7388 MVT RegisterVT = TLI->getRegisterType(*CurDAG->getContext(), VT);
7391 ISD::InputArg MyFlags(Flags, RegisterVT, VT, isArgValueUsed,
7392 Idx-1, PartBase+i*RegisterVT.getStoreSize());
