Lines Matching defs:BitSize
1823 // CCMask says which comparison result is being tested and BitSize is
1826 static unsigned getTestUnderMaskCond(unsigned BitSize, unsigned CCMask,
1963 unsigned BitSize = NewC.Op0.getValueType().getSizeInBits();
1968 (NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask,
1977 (NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask,
1984 NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, MaskVal, CmpVal,
3008 int64_t BitSize = (int64_t)1 << Log2_32_Ceil(NumSignificantBits);
3009 BitSize = std::min(BitSize, OrigBitSize);
3017 // position larger than BitSize remain zero throughout.
3018 for (int64_t I = BitSize / 2; I >= 8; I = I / 2) {
3020 if (BitSize != OrigBitSize)
3022 DAG.getConstant(((uint64_t)1 << BitSize) - 1, DL, VT));
3027 if (BitSize > 8)
3029 DAG.getConstant(BitSize - 8, DL, VT));
3068 int64_t BitSize = NarrowVT.getSizeInBits();
3105 DAG.getConstant(32 - BitSize, DL, WideVT));
3109 DAG.getConstant(uint32_t(-1) >> BitSize, DL, WideVT));
3114 DAG.getConstant(BitSize, DL, WideVT) };
3121 DAG.getConstant(BitSize, DL, WideVT));
3178 int64_t BitSize = NarrowVT.getSizeInBits();
3205 NegBitShift, DAG.getConstant(BitSize, DL, WideVT) };
4979 // BitSize is the width of the field in bits, or 0 if this is a partword
4980 // ATOMIC_LOADW_* or ATOMIC_SWAPW instruction, in which case the bitsize
4987 unsigned BitSize,
4993 bool IsSubWord = (BitSize < 32);
5005 BitSize = MI->getOperand(6).getImm();
5008 const TargetRegisterClass *RC = (BitSize <= 32 ?
5011 unsigned LOpcode = BitSize <= 32 ? SystemZ::L : SystemZ::LG;
5012 unsigned CSOpcode = BitSize <= 32 ? SystemZ::CS : SystemZ::CSG;
5061 if (BitSize <= 32)
5062 // XILF with the upper BitSize bits set.
5064 .addReg(Tmp).addImm(-1U << (32 - BitSize));
5082 .addImm(32).addImm(31 + BitSize).addImm(32 - BitSize);
5101 // for when the current field should be kept. BitSize is the width of
5108 unsigned BitSize) const {
5113 bool IsSubWord = (BitSize < 32);
5124 BitSize = MI->getOperand(6).getImm();
5127 const TargetRegisterClass *RC = (BitSize <= 32 ?
5130 unsigned LOpcode = BitSize <= 32 ? SystemZ::L : SystemZ::LG;
5131 unsigned CSOpcode = BitSize <= 32 ? SystemZ::CS : SystemZ::CSG;
5182 // %RotatedAltVal = RISBG %RotatedOldVal, %Src2, 32, 31 + BitSize, 0
5188 .addImm(32).addImm(31 + BitSize).addImm(0);
5234 int64_t BitSize = MI->getOperand(7).getImm();
5273 // %Dest = RLL %OldVal, BitSize(%BitShift)
5274 // ^^ The low BitSize bits contain the field
5276 // %RetryCmpVal = RISBG32 %CmpVal, %Dest, 32, 63-BitSize, 0
5277 // ^^ Replace the upper 32-BitSize bits of the
5294 .addReg(OldVal).addReg(BitShift).addImm(BitSize);
5296 .addReg(CmpVal).addReg(Dest).addImm(32).addImm(63 - BitSize).addImm(0);
5306 // %RetrySwapVal = RISBG32 %SwapVal, %Dest, 32, 63-BitSize, 0
5307 // ^^ Replace the upper 32-BitSize bits of the new
5309 // %StoreVal = RLL %RetrySwapVal, -BitSize(%NegBitShift)
5316 .addReg(SwapVal).addReg(Dest).addImm(32).addImm(63 - BitSize).addImm(0);
5318 .addReg(RetrySwapVal).addReg(NegBitShift).addImm(-BitSize);
