Lines Matching defs:Indices
93 // The lane mask is simply the union of all sub-indices.
252 // Expand any composed subreg indices.
254 // qsub_1 subreg, add a dsub_2 subreg. Keep growing Indices and process
255 // expanded subreg indices recursively.
256 SmallVector<CodeGenSubRegIndex*, 8> Indices = ExplicitSubRegIndices;
257 for (unsigned i = 0; i != Indices.size(); ++i) {
258 CodeGenSubRegIndex *Idx = Indices[i];
276 Indices.push_back(I->second);
282 // Work backwards in the Indices vector in order to compose subregs bottom-up.
296 while (!Indices.empty() && !Orphans.empty()) {
297 CodeGenSubRegIndex *Idx = Indices.pop_back_val();
337 // that getConcatSubRegIndex() won't invent any concatenated indices that the
463 // Create sub-register index composition maps for the synthesized indices.
496 // Loops and idempotent indices have TopoSig = ~0u.
543 std::vector<Record*> Indices = Def->getValueAsListOfDefs("SubRegIndices");
544 unsigned Dim = Indices.size();
929 // Read in the user-defined (named) sub-register indices.
930 // More indices will be synthesized later.
972 // This will create Composite entries for all inferred sub-register indices.
1163 // indices overlap in some register.
1165 // Conservatively share a lane mask bit if two sub-register indices overlap in
1168 // First assign individual bits to all the leaf indices.
1912 // numerical order to visit synthetic indices last.
1944 // Iterate in SubRegIndex numerical order to visit synthetic indices last.
