Lines Matching refs:Emit
67 selector->Emit(opcode, g.DefineAsRegister(node),
76 selector->Emit(opcode, g.DefineAsRegister(node),
84 selector->Emit(opcode, g.DefineAsRegister(node),
122 selector->Emit(opcode, output_count, outputs, input_count, inputs);
167 Emit(opcode | AddressingModeField::encode(kMode_MRI),
171 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
173 // Emit desired load opcode, using temp addr_reg.
174 Emit(opcode | AddressingModeField::encode(kMode_MRI),
217 Emit(code, 0, nullptr, input_count, inputs, temp_count, temps);
246 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
250 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
252 // Emit desired store opcode, using temp addr_reg.
253 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
285 Emit(kMipsExt, g.DefineAsRegister(node),
300 Emit(kMipsIns, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),
321 Emit(kMipsNor, g.DefineAsRegister(node),
330 Emit(kMipsNor, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
357 Emit(kMipsShl, g.DefineAsRegister(node),
383 Emit(kMipsExt, g.DefineAsRegister(node),
412 selector->Emit(opcode, 2, outputs, 4, inputs);
449 selector->Emit(opcode, 2, outputs, 3, inputs);
479 Emit(kMipsCtz, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
485 Emit(kMipsPopcnt, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
499 Emit(kMipsLsa, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
511 Emit(kMipsLsa, g.DefineAsRegister(node), g.UseRegister(m.right().node()),
532 Emit(kMipsShl | AddressingModeField::encode(kMode_None),
538 Emit(kMipsLsa, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
545 Emit(kMipsShl | AddressingModeField::encode(kMode_None), temp,
548 Emit(kMipsSub | AddressingModeField::encode(kMode_None),
564 Emit(kMipsMulHighU, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)),
572 Emit(kMipsDiv, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),
580 Emit(kMipsDivU, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),
588 Emit(kMipsMod, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
596 Emit(kMipsModU, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
644 Emit(kMipsFloorWD, g.DefineAsRegister(node),
648 Emit(kMipsCeilWD, g.DefineAsRegister(node),
652 Emit(kMipsRoundWD, g.DefineAsRegister(node),
656 Emit(kMipsTruncWD, g.DefineAsRegister(node),
668 Emit(kMipsFloorWS, g.DefineAsRegister(node),
672 Emit(kMipsCeilWS, g.DefineAsRegister(node),
676 Emit(kMipsRoundWS, g.DefineAsRegister(node),
680 Emit(kMipsTruncWS, g.DefineAsRegister(node),
684 Emit(kMipsTruncWS, g.DefineAsRegister(node),
690 Emit(kMipsTruncWS, g.DefineAsRegister(node),
715 Emit(kMipsCvtSW, g.DefineAsRegister(node),
737 Emit(kMipsFloat64InsertLowWord32, g.DefineAsRegister(node),
770 Emit(kMipsFloat64RoundUp, g.DefineAsRegister(node),
805 Emit(kMipsModD, g.DefineAsFixed(node, f0), g.UseFixed(node->InputAt(0), f12),
813 Emit(kMipsFloat32Max, g.DefineAsRegister(node),
819 Emit(kMipsFloat32Max, g.DefineSameAsFirst(node),
828 Emit(kMipsFloat64Max, g.DefineAsRegister(node),
834 Emit(kMipsFloat64Max, g.DefineSameAsFirst(node),
843 Emit(kMipsFloat32Min, g.DefineAsRegister(node),
849 Emit(kMipsFloat32Min, g.DefineSameAsFirst(node),
858 Emit(kMipsFloat64Min, g.DefineAsRegister(node),
864 Emit(kMipsFloat64Min, g.DefineSameAsFirst(node),
940 Emit(opcode, g.DefineAsFixed(node, f0), g.UseFixed(node->InputAt(0), f12),
948 Emit(opcode, g.DefineAsFixed(node, f0), g.UseFixed(node->InputAt(0), f12))
959 Emit(kArchPrepareCallCFunction |
967 Emit(kMipsStoreToStackSlot, g.NoOutput(), g.UseRegister(input.node()),
976 Emit(kMipsStackClaim, g.NoOutput(),
982 Emit(kMipsStoreToStackSlot, g.NoOutput(), g.UseRegister(input.node()),
1035 Emit(opcode | AddressingModeField::encode(kMode_MRI),
1079 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
1093 selector->Emit(opcode, g.NoOutput(), left, right,
1100 selector->Emit(opcode, g.DefineAsRegister(cont->result()), left, right);
1284 // Continuation could not be combined with a compare, emit compare against 0.
1289 selector->Emit(opcode, g.NoOutput(), value_operand, g.TempImmediate(0),
1296 selector->Emit(opcode, g.DefineAsRegister(cont->result()), value_operand,
1325 // Emit either ArchTableSwitch or ArchLookupSwitch.
1337 Emit(kMipsSub, index_operand, value_operand,
1445 Emit(kMipsFloat64ExtractLowWord32, g.DefineAsRegister(node),
1452 Emit(kMipsFloat64ExtractHighWord32, g.DefineAsRegister(node),
1461 Emit(kMipsFloat64InsertLowWord32, g.DefineSameAsFirst(node),
1470 Emit(kMipsFloat64InsertHighWord32, g.DefineSameAsFirst(node),
1478 Emit(kMipsFloat64SilenceNaN, g.DefineSameAsFirst(node), g.UseRegister(left),
1503 Emit(opcode | AddressingModeField::encode(kMode_MRI),
1507 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
1509 // Emit desired load opcode, using temp addr_reg.
1510 Emit(opcode | AddressingModeField::encode(kMode_MRI),
1538 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
1542 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
1544 // Emit desired store opcode, using temp addr_reg.
1545 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
