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  /external/clang/test/Sema/
block-call.c 3 int (*FP)();
7 int (*FPL) (int) = FP; // C doesn't consider this an error.
  /external/clang/test/SemaCXX/
block-call.cpp 3 int (*FP)();
7 int (*FPL) (int) = FP; // expected-error {{cannot initialize a variable of type 'int (*)(int)' with an lvalue of type 'int (*)()'}}
explicit.cpp 226 struct FP {
233 FP fp; local
235 fp(1);
  /external/boringssl/src/crypto/des/
internal.h 126 /* IP and FP
157 Thanks for hints from Richard Outerbridge - he told me IP&FP
176 #define FP(l, r) \
  /external/libcxx/src/
chrono.cpp 119 typedef steady_clock::rep (*FP)();
122 FP
137 static FP fp = init_steady_clock(); variable
138 return time_point(duration(fp()));
  /ndk/sources/cxx-stl/llvm-libc++/libcxx/src/
chrono.cpp 88 typedef steady_clock::rep (*FP)();
91 FP
106 static FP fp = init_steady_clock(); variable
107 return time_point(duration(fp()));
  /art/disassembler/
disassembler_arm64.cc 37 FP = 29,
  /external/clang/test/CodeGen/
pointer-arithmetic.c 10 typedef void (*FP)(void);
18 FP f5(FP a, int b) { return a + b; }
19 FP f5_1(FP a, int b) { return (a += b); }
20 FP f6(int a, FP b) { return a + b; }
21 FP f6_1(int a, FP b) { return (a += b); }
22 FP f7(FP a, int b) { return a - b;
    [all...]
struct-init.c 37 void (*FP)(struct fp_struct_bar);
  /external/llvm/lib/Target/Hexagon/
HexagonExpandPredSpillCode.cpp 244 unsigned FP = MI->getOperand(0).getReg();
245 assert(FP == QST.getRegisterInfo()->getFrameRegister() &&
259 .addReg(FP).addReg(HEXAGON_RESERVED_REG_1);
268 HEXAGON_RESERVED_REG_1).addReg(FP).addImm(Offset);
282 addReg(FP).addImm(Offset).addReg(HEXAGON_RESERVED_REG_2);
291 unsigned FP = MI->getOperand(1).getReg();
292 assert(FP == QST.getRegisterInfo()->getFrameRegister() &&
303 .addReg(FP)
313 HEXAGON_RESERVED_REG_1).addReg(FP).addImm(Offset);
323 HEXAGON_RESERVED_REG_2).addReg(FP).addImm(Offset)
    [all...]
  /external/llvm/lib/Target/Mips/
MipsRegisterInfo.cpp 185 // Reserve FP if this function should have a dedicated frame pointer register.
190 Reserved.set(Mips::FP);
292 return TFI->hasFP(MF) ? (IsN64 ? Mips::FP_64 : Mips::FP) :
308 unsigned FP = Subtarget.isGP32bit() ? Mips::FP : Mips::FP_64;
317 if (!MF.getRegInfo().canReserveReg(FP))
MipsSEFrameLowering.cpp 391 unsigned FP = ABI.GetFramePtr();
505 // Insert instruction "move $fp, $sp" at this location.
506 BuildMI(MBB, MBBI, dl, TII.get(MOVE), FP).addReg(SP).addReg(ZERO)
509 // emit ".cfi_def_cfa_register $fp"
511 nullptr, MRI->getDwarfRegNum(FP, true)));
680 unsigned FP = ABI.GetFramePtr();
692 // Insert instruction "move $sp, $fp" at this location.
693 BuildMI(MBB, I, DL, TII.get(MOVE), SP).addReg(FP).addReg(ZERO);
848 unsigned FP = ABI.GetFramePtr();
851 // Mark $fp as used if function has dedicated frame pointer
    [all...]
  /art/runtime/arch/arm/
registers_arm.h 44 FP = 11,
  /external/llvm/lib/Target/AArch64/MCTargetDesc/
AArch64AsmBackend.cpp 276 /// \brief This is a standard arm64 prologue where FP/LR are immediately
277 /// pushed on the stack, then SP is copied to FP. If there are any
279 /// in a contiguous ranger right below the saved FP/LR pair. Any subset of the
338 AArch64::FP &&
355 assert(LRReg == AArch64::LR && FPReg == AArch64::FP &&
  /external/llvm/tools/bugpoint/
ExtractFunction.cpp 269 Constant *FP = CS->getOperand(1);
270 if (ConstantExpr *CE = dyn_cast<ConstantExpr>(FP))
272 FP = CE->getOperand(0);
273 if (Function *F = dyn_cast<Function>(FP)) {
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/bfin/
arithmetic.s 16 FP = p1 + fp;
51 FP += -32;
84 fp -= p2;
95 P5 += Fp (BREV);
load.s 10 FP.L = 0xfedc;
20 fp = 0xff20 (Z); define
32 fp = 44 (X); define
46 Sp = [ fp];
47 FP = [ p0++ ];
50 p3 = [fp + 0];
51 P4 = [FP + 0x0001FFFC];
52 sp = [fp-0x0001fffc];
54 P5 = [FP-128];
63 R4 = [Fp + 40]
    [all...]
move2.s 26 FP = FP;
38 R4 = FP;
50 FP = R4;
99 FP = M3;
108 FP = L3;
135 I3 = FP;
144 M3 = FP;
153 B3 = FP;
162 L3 = FP;
    [all...]
  /toolchain/binutils/binutils-2.25/include/opcode/
i960.h 101 #define FP 0x04 /* Mask for "floating-point-OK" bit */
106 #define OP(align,lit,fp,sfr) ( align | lit | fp | sfr )
112 #define F OP( 0, 0, FP, 0 )
113 #define FL OP( 0, LIT, FP, 0 )
116 #define F2 OP( 1, 0, FP, 0 )
117 #define FL2 OP( 1, LIT, FP, 0 )
120 #define F4 OP( 3, 0, FP, 0 )
121 #define FL4 OP( 3, LIT, FP, 0 )
129 #define FP_OK(od) (od & FP) /* TRUE if floating-point op allowed *
    [all...]
  /art/runtime/arch/mips/
registers_mips.h 60 FP = 30, // Saved value/frame pointer.
  /external/llvm/lib/Target/PowerPC/
PPCRegisterInfo.cpp 175 // The FP register is also not really a register, but is the representation
177 Reserved.set(PPC::FP);
268 unsigned FP = TFI->hasFP(MF) ? 1 : 0;
269 return 32 - FP - DefaultSafety;
811 // Replace the FrameIndex with base register with GPR1 (SP) or GPR31 (FP).
    [all...]
  /external/llvm/lib/Target/WebAssembly/
WebAssemblyISelLowering.cpp 641 unsigned FP =
643 SDValue FrameAddr = DAG.getCopyFromReg(DAG.getEntryNode(), DL, FP, PtrVT);
  /external/llvm/lib/Target/XCore/
XCoreFrameLowering.cpp 255 bool FP = hasFP(MF);
274 // If necessary, save LR and FP to the stack, as we EXTSP.
276 GetSpillList(SpillList, MFI, XFI, saveLR, FP);
304 if (FP) {
305 // Set the FP from the SP.
382 bool FP = hasFP(MF);
384 if (FP) // Restore the stack pointer.
387 // If necessary, restore LR and FP from the stack, as we EXTSP.
389 GetSpillList(SpillList, MFI, XFI, restoreLR, FP);
435 "LR & FP are always handled in emitPrologue")
    [all...]
  /external/llvm/lib/Transforms/Utils/
LoopUtils.cpp 417 bool FP = I->getType()->isFloatingPointTy();
419 if (!UAI && FP && !I->hasUnsafeAlgebra())
472 if (F.hasFnAttribute("no-nans-fp-math"))
474 F.getFnAttribute("no-nans-fp-math").getValueAsString() == "true";
597 // We only match FP sequences with unsafe algebra, so we can unconditionally
  /external/llvm/lib/Target/ARM/
ARMBaseRegisterInfo.cpp 205 unsigned FP = TFI->hasFP(MF) ? 1 : 0;
206 return 10 - FP - (STI.isR9Reserved() ? 1 : 0);
314 // Thumb has trouble with negative offsets from the FP. Thumb2 has a limited
472 /// reference would be better served by a base register other than FP
516 // will be earlier than the FP, so we ignore those.
533 // The FP is only available if there is no dynamic realignment. We

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