/external/llvm/lib/CodeGen/ |
AtomicExpandPass.cpp | 51 bool IsStore, bool IsLoad); 103 bool IsStore, IsLoad; 109 IsLoad = true; 114 IsLoad = false; 119 IsStore = IsLoad = true; 130 IsStore = IsLoad = true; 134 MadeChange |= bracketInstWithFences(I, FenceOrdering, IsStore, IsLoad); 179 bool IsStore, bool IsLoad) { 182 auto LeadingFence = TLI->emitLeadingFence(Builder, Order, IsStore, IsLoad); 184 auto TrailingFence = TLI->emitTrailingFence(Builder, Order, IsStore, IsLoad); [all...] |
InlineSpiller.cpp | [all...] |
/external/llvm/lib/Target/AMDGPU/ |
SIRegisterInfo.cpp | 215 bool IsLoad = TII->get(LoadStoreOp).mayLoad(); 244 .addReg(SubReg, getDefRegState(IsLoad)) 251 .addReg(Value, RegState::Implicit | getDefRegState(IsLoad))
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/external/v8/src/arm64/ |
instructions-arm64.cc | 16 bool Instruction::IsLoad() const {
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/external/clang/include/clang/StaticAnalyzer/Core/ |
Checker.h | 197 const SVal &location, bool isLoad, const Stmt *S, 199 ((const CHECKER *)checker)->checkLocation(location, isLoad, S, C); 529 bool IsLoad;
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/external/llvm/lib/Target/PowerPC/ |
PPCVSXSwapRemoval.cpp | 78 unsigned int IsLoad : 1; 342 SwapVector[VecIdx].IsLoad = 1; 348 SwapVector[VecIdx].IsLoad = 1; 357 SwapVector[VecIdx].IsLoad = 1; 663 else if (SwapVector[EntryIdx].IsLoad && SwapVector[EntryIdx].IsSwap) { 674 if (!SwapVector[UseIdx].IsSwap || SwapVector[UseIdx].IsLoad || 697 if (!SwapVector[DefIdx].IsSwap || SwapVector[DefIdx].IsLoad || 728 if (SwapVector[EntryIdx].IsLoad && SwapVector[EntryIdx].IsSwap) { [all...] |
/external/v8/test/unittests/interpreter/ |
interpreter-assembler-unittest.cc | 77 Matcher<Node*> InterpreterAssemblerTest::InterpreterAssemblerForTest::IsLoad( 80 return ::i::compiler::IsLoad(rep_matcher, base_matcher, index_matcher, _, _); 94 return IsLoad( 105 Matcher<Node*> load_matcher = IsLoad( 121 return IsLoad( 140 bytes[i] = IsLoad( 158 load_matcher = IsLoad( 177 bytes[i] = IsLoad( 199 return IsLoad( 218 bytes[i] = IsLoad( [all...] |
/external/vixl/src/vixl/a64/ |
instructions-a64.cc | 74 bool Instruction::IsLoad() const {
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/external/clang/lib/StaticAnalyzer/Core/ |
CheckerManager.cpp | 293 bool IsLoad; 302 SVal loc, bool isLoad, const Stmt *NodeEx, 305 : Checkers(checkers), Loc(loc), IsLoad(isLoad), NodeEx(NodeEx), 310 ProgramPoint::Kind K = IsLoad ? ProgramPoint::PreLoadKind : 317 checkFn(Loc, IsLoad, BoundEx, C); 326 SVal location, bool isLoad, 330 CheckLocationContext C(LocationCheckers, location, isLoad, NodeEx,
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/external/llvm/lib/Target/AArch64/Disassembler/ |
AArch64Disassembler.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMExpandPseudoInsts.cpp | 107 bool IsLoad; 382 assert(TableEntry && TableEntry->IsLoad && "NEONLdStTable lookup failed"); 447 assert(TableEntry && !TableEntry->IsLoad && "NEONLdStTable lookup failed"); 523 if (TableEntry->IsLoad) { 548 if (!TableEntry->IsLoad) 573 if (TableEntry->IsLoad) [all...] |
ARMLoadStoreOptimizer.cpp | 454 bool IsLoad = 459 if (IsLoad || IsStore) { 777 bool IsLoad = isi32Load(Opcode); 778 assert((IsLoad || isi32Store(Opcode)) && "Must have integer load or store"); 779 unsigned LoadStoreOpcode = IsLoad ? ARM::t2LDRDi8 : ARM::t2STRDi8; 784 if (IsLoad) { 799 bool IsLoad = isLoadSingle(Opcode); 814 if (IsLoad) { [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonExpandCondsets.cpp | 853 bool IsLoad = TheI->mayLoad(), IsStore = TheI->mayStore(); 854 if (!IsLoad && !IsStore) [all...] |
/external/v8/test/unittests/compiler/ |
node-test-utils.cc | [all...] |
/external/clang/lib/CodeGen/ |
CGAtomic.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |
/external/v8/src/crankshaft/ |
hydrogen.h | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
DAGCombiner.cpp | [all...] |