/external/llvm/lib/Target/AMDGPU/ |
SIFixControlFlowLiveIntervals.cpp | 68 LiveIntervals *LIS = &getAnalysis<LiveIntervals>(); 80 LIS->getInterval(Reg).markNotSpillable();
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SILoadStoreOptimizer.cpp | 62 LiveIntervals *LIS; 91 LIS(nullptr) {} 271 LIS->InsertMachineInstrInMaps(Read2); 275 SlotIndex PairedIndex = LIS->getInstructionIndex(Paired); 276 LiveRange &M0Range = LIS->getRegUnit(*MCRegUnitIterator(AMDGPU::M0, TRI)); 282 LIS->ReplaceMachineInstrInMaps(I, Copy0); 283 LIS->ReplaceMachineInstrInMaps(Paired, Copy1); 288 LiveInterval &AddrRegLI = LIS->getInterval(AddrReg->getReg()); 289 LIS->shrinkToUses(&AddrRegLI); 291 LIS->createAndComputeVirtRegInterval(DestReg) [all...] |
/external/llvm/include/llvm/CodeGen/ |
CalcSpillWeights.h | 54 LiveIntervals &LIS; 62 VirtRegAuxInfo(MachineFunction &mf, LiveIntervals &lis, 66 : MF(mf), LIS(lis), VRM(vrm), Loops(loops), MBFI(mbfi), normalize(norm) {} 74 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
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LiveRegMatrix.h | 40 LiveIntervals *LIS;
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LiveRangeEdit.h | 64 LiveIntervals &LIS; 115 /// @param lis The collection of all live intervals in this function. 120 MachineFunction &MF, LiveIntervals &lis, VirtRegMap *vrm, 122 : Parent(parent), NewRegs(newRegs), MRI(MF.getRegInfo()), LIS(lis), 212 /// to erase it from LIS.
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RegAllocPBQP.h | 146 LiveIntervals &LIS, 148 : MF(MF), LIS(LIS), MBFI(MBFI) {} 151 LiveIntervals &LIS;
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MachineScheduler.h | 107 LiveIntervals *LIS; 231 LiveIntervals *LIS; 260 LIS(C->LIS), SchedImpl(std::move(S)), Topo(SUnits, &ExitSU), 272 LiveIntervals *getLIS() const { return LIS; }
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/external/llvm/lib/CodeGen/ |
RegAllocBase.h | 64 LiveIntervals *LIS; 69 : TRI(nullptr), MRI(nullptr), VRM(nullptr), LIS(nullptr), Matrix(nullptr) {} 74 void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
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InterferenceCache.h | 57 /// LIS - Used for accessing register mask interference maps. 58 LiveIntervals *LIS; 97 Entry() : PhysReg(0), Tag(0), RefCount(0), Indexes(nullptr), LIS(nullptr) {} 99 void clear(MachineFunction *mf, SlotIndexes *indexes, LiveIntervals *lis) { 104 LIS = lis;
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SplitKit.h | 46 const LiveIntervals &LIS; 120 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis, 213 LiveIntervals &LIS;
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VirtRegMap.cpp | 164 LiveIntervals *LIS; 215 LIS = &getAnalysis<LiveIntervals>(); 223 LIS->addKillFlags(VRM); 291 LiveInterval &LI = LIS->getInterval(VirtReg); 292 if (LI.empty() || LIS->intervalIsInOneMBB(LI)) 330 const LiveInterval &LI = LIS->getInterval(Reg); 332 SlotIndex BaseIndex = LIS->getInstructionIndex(&MI);
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PHIElimination.cpp | 58 LiveIntervals *LIS; 135 LIS = getAnalysisIfAvailable<LiveIntervals>(); 144 if (!DisableEdgeSplitting && (LV || LIS)) { 161 if (LIS) 162 LIS->RemoveMachineInstrFromMaps(DefMI); 170 if (LIS) 171 LIS->RemoveMachineInstrFromMaps(I->first); 311 if (LIS) { 313 SlotIndex DestCopyIndex = LIS->InsertMachineInstrInMaps(NewInstr); 315 SlotIndex MBBStartIndex = LIS->getMBBStartIdx(&MBB) [all...] |
RegAllocPBQP.cpp | 127 void findVRegIntervalsToAlloc(const MachineFunction &MF, LiveIntervals &LIS); 134 MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM, 146 void finalizeAlloc(MachineFunction &MF, LiveIntervals &LIS, 157 LiveIntervals &LIS = G.getMetadata().LIS; 165 LIS.getInterval(G.getNodeMetadata(NId).getVReg()).weight; 276 LiveIntervals &LIS = G.getMetadata().LIS; 299 LiveInterval &LI = LIS.getInterval(VReg); 524 LiveIntervals &LIS) { [all...] |
InlineSpiller.cpp | 60 LiveIntervals &LIS; 142 : MF(mf), LIS(pass.getAnalysis<LiveIntervals>()), 236 if (SnipLI.getNumValNums() > 2 || !LIS.intervalIsInOneMBB(SnipLI)) 288 LiveInterval &SnipLI = LIS.getInterval(SnipReg); 374 SV.SpillMBB = LIS.getMBBFromIndex(SV.SpillVNI->def); 392 DepSV.SpillMBB = LIS.getMBBFromIndex(DepSV.SpillVNI->def); 511 LiveInterval &OrigLI = LIS.getInterval(Original); 548 LiveInterval &LI = LIS.getInterval(Reg); 593 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def); 599 LiveInterval &SrcLI = LIS.getInterval(SrcReg) [all...] |
LiveDebugVariables.cpp | 133 LiveIntervals &LIS, const TargetInstrInfo &TII); 138 LiveIntervals &LIS); 230 /// @param LIS Live intervals analysis. 235 LiveIntervals &LIS, MachineDominatorTree &MDT, 249 LiveIntervals &LIS); 254 LiveIntervals &LIS, MachineDominatorTree &MDT, 260 LiveIntervals &LIS); 268 LiveIntervals &LIS, const TargetInstrInfo &TRI); 282 LiveIntervals *LIS; 522 LIS->getMBBStartIdx(MBB) [all...] |
LiveIntervalAnalysis.cpp | [all...] |
MachineBasicBlock.cpp | 755 LiveIntervals *LIS = P->getAnalysisIfAvailable<LiveIntervals>(); 757 if (LIS) 758 LIS->insertMBBInMaps(NMBB); 789 if (LIS) { 882 if (LIS) { 910 LiveInterval &LI = LIS->getInterval(Reg); 922 if (PHISrcRegs.count(Reg) || !LIS->hasInterval(Reg)) 925 LiveInterval &LI = LIS->getInterval(Reg); [all...] |
TwoAddressInstructionPass.cpp | 79 LiveIntervals *LIS; 181 static bool isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS); 222 if (LIS) { 223 LiveInterval &LI = LIS->getInterval(SavedReg); 227 SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot(); 233 KillMI = LIS->getInstructionFromIndex(I->end); 280 if (MO.isKill() || (LIS && isPlainlyKilled(OtherMI, MOReg, LIS))) { 293 if (!LIS) { 307 if (LIS) [all...] |
RegisterCoalescer.cpp | 88 LiveIntervals *LIS; 229 if (LIS->shrinkToUses(LI, Dead)) { 233 LIS->splitSeparateComponents(*LI, SplitLIs); 452 LiveRangeEdit(nullptr, NewRegs, *MF, *LIS, 467 LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg()); 469 LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg()); 470 SlotIndex CopyIdx = LIS->getInstructionIndex(CopyMI).getRegSlot(); 506 MachineInstr *ACopyMI = LIS->getInstructionFromIndex(AValNo->def); 520 LIS->getInstructionFromIndex(ValS->end.getPrevSlot()); 581 if (LIS->hasPHIKill(IntA, AValNo) [all...] |
MachineScheduler.cpp | 96 MF(nullptr), MLI(nullptr), MDT(nullptr), PassConfig(nullptr), AA(nullptr), LIS(nullptr) { 332 LIS = &getAnalysis<LiveIntervals>(); 335 DEBUG(LIS->dump()); 345 DEBUG(LIS->dump()); 642 if (LIS) 643 LIS->handleMove(MI, /*UpdateFlags=*/true); 877 TopRPTracker.init(&MF, RegClassInfo, LIS, BB, RegionBegin); 878 BotRPTracker.init(&MF, RegClassInfo, LIS, BB, LiveRegionEnd); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCTLSDynamicCall.cpp | 50 LiveIntervals *LIS; 128 LIS->repairIntervalsInRange(&MBB, First, Last, OrigRegs); 138 LIS = &getAnalysis<LiveIntervals>();
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PPCVSXFMAMutate.cpp | 60 LiveIntervals *LIS; 102 SlotIndex FMAIdx = LIS->getInstructionIndex(MI); 105 LIS->getInterval(MI->getOperand(1).getReg()).Query(FMAIdx).valueIn(); 111 MachineInstr *AddendMI = LIS->getInstructionFromIndex(AddendValNo->def); 174 if (LIS->getInterval(MI->getOperand(2).getReg()) 178 } else if (LIS->getInterval(MI->getOperand(3).getReg()) 195 !LIS->getInterval(AddendSrcReg).liveAt(FMAIdx)) 261 LiveInterval &FMAInt = LIS->getInterval(OldFMAReg); 279 LiveInterval &NewFMAInt = LIS->getInterval(KilledProdReg); 288 LIS->getVNInfoAllocator()) [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonExpandCondsets.cpp | 97 LIS(0), CoaLimitActive(false), 121 LiveIntervals *LIS; 274 MachineInstr *MI = LIS->getInstructionFromIndex(S); 294 LiveInterval &LI = LIS->getInterval(Reg); 298 MachineInstr *MI = LIS->getInstructionFromIndex(I->start); 302 MachineInstr *MI = LIS->getInstructionFromIndex(S); 329 LIS->shrinkToUses(&LI, &Deads); 343 SlotIndex S = LIS->getInstructionIndex(MI).getRegSlot(); 350 T->end = LIS->getMBBEndIdx(MI->getParent()); 364 MachineInstr *MI = LIS->getInstructionFromIndex(EX) [all...] |