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      1 /*
      2  * Copyright (C) 2011 The Android Open Source Project
      3  *
      4  * Licensed under the Apache License, Version 2.0 (the "License");
      5  * you may not use this file except in compliance with the License.
      6  * You may obtain a copy of the License at
      7  *
      8  *      http://www.apache.org/licenses/LICENSE-2.0
      9  *
     10  * Unless required by applicable law or agreed to in writing, software
     11  * distributed under the License is distributed on an "AS IS" BASIS,
     12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     13  * See the License for the specific language governing permissions and
     14  * limitations under the License.
     15  */
     16 
     17 #ifndef ART_COMPILER_UTILS_MANAGED_REGISTER_H_
     18 #define ART_COMPILER_UTILS_MANAGED_REGISTER_H_
     19 
     20 #include <vector>
     21 
     22 namespace art {
     23 
     24 namespace arm {
     25 class ArmManagedRegister;
     26 }
     27 namespace arm64 {
     28 class Arm64ManagedRegister;
     29 }
     30 namespace mips {
     31 class MipsManagedRegister;
     32 }
     33 namespace mips64 {
     34 class Mips64ManagedRegister;
     35 }
     36 
     37 namespace x86 {
     38 class X86ManagedRegister;
     39 }
     40 
     41 namespace x86_64 {
     42 class X86_64ManagedRegister;
     43 }
     44 
     45 class ManagedRegister {
     46  public:
     47   // ManagedRegister is a value class. There exists no method to change the
     48   // internal state. We therefore allow a copy constructor and an
     49   // assignment-operator.
     50   ManagedRegister(const ManagedRegister& other) : id_(other.id_) { }
     51 
     52   ManagedRegister& operator=(const ManagedRegister& other) {
     53     id_ = other.id_;
     54     return *this;
     55   }
     56 
     57   arm::ArmManagedRegister AsArm() const;
     58   arm64::Arm64ManagedRegister AsArm64() const;
     59   mips::MipsManagedRegister AsMips() const;
     60   mips64::Mips64ManagedRegister AsMips64() const;
     61   x86::X86ManagedRegister AsX86() const;
     62   x86_64::X86_64ManagedRegister AsX86_64() const;
     63 
     64   // It is valid to invoke Equals on and with a NoRegister.
     65   bool Equals(const ManagedRegister& other) const {
     66     return id_ == other.id_;
     67   }
     68 
     69   bool IsNoRegister() const {
     70     return id_ == kNoRegister;
     71   }
     72 
     73   static ManagedRegister NoRegister() {
     74     return ManagedRegister();
     75   }
     76 
     77   int RegId() const { return id_; }
     78   explicit ManagedRegister(int reg_id) : id_(reg_id) { }
     79 
     80  protected:
     81   static const int kNoRegister = -1;
     82 
     83   ManagedRegister() : id_(kNoRegister) { }
     84 
     85   int id_;
     86 };
     87 
     88 class ManagedRegisterSpill : public ManagedRegister {
     89  public:
     90   // ManagedRegisterSpill contains information about data type size and location in caller frame
     91   // These additional attributes could be defined by calling convention (EntrySpills)
     92   ManagedRegisterSpill(const ManagedRegister& other, uint32_t size, uint32_t spill_offset)
     93       : ManagedRegister(other), size_(size), spill_offset_(spill_offset)  { }
     94 
     95   explicit ManagedRegisterSpill(const ManagedRegister& other)
     96       : ManagedRegister(other), size_(-1), spill_offset_(-1) { }
     97 
     98   ManagedRegisterSpill(const ManagedRegister& other, int32_t size)
     99       : ManagedRegister(other), size_(size), spill_offset_(-1) { }
    100 
    101   int32_t getSpillOffset() {
    102     return spill_offset_;
    103   }
    104 
    105   int32_t getSize() {
    106     return size_;
    107   }
    108 
    109  private:
    110   int32_t size_;
    111   int32_t spill_offset_;
    112 };
    113 
    114 class ManagedRegisterEntrySpills : public std::vector<ManagedRegisterSpill> {
    115  public:
    116   // The ManagedRegister does not have information about size and offset.
    117   // In this case it's size and offset determined by BuildFrame (assembler)
    118   void push_back(ManagedRegister __x) {
    119     ManagedRegisterSpill spill(__x);
    120     std::vector<ManagedRegisterSpill>::push_back(spill);
    121   }
    122 
    123   void push_back(ManagedRegister __x, int32_t __size) {
    124     ManagedRegisterSpill spill(__x, __size);
    125     std::vector<ManagedRegisterSpill>::push_back(spill);
    126   }
    127 
    128   void push_back(ManagedRegisterSpill __x) {
    129     std::vector<ManagedRegisterSpill>::push_back(__x);
    130   }
    131  private:
    132 };
    133 
    134 }  // namespace art
    135 
    136 #endif  // ART_COMPILER_UTILS_MANAGED_REGISTER_H_
    137