| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 339 BSWAP, CTTZ, CTLZ, CTPOP, BITREVERSE,
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 284 case ISD::BITREVERSE:
720 case ISD::BITREVERSE:
[all...] |
| SelectionDAGDumper.cpp | 315 case ISD::BITREVERSE: return "bitreverse";
|
| LegalizeIntegerTypes.cpp | 56 case ISD::BITREVERSE: Res = PromoteIntRes_BITREVERSE(N); break;
328 ISD::SRL, dl, NVT, DAG.getNode(ISD::BITREVERSE, dl, NVT, Op),
[all...] |
| LegalizeVectorTypes.cpp | 70 case ISD::BITREVERSE:
624 case ISD::BITREVERSE:
[all...] |
| LegalizeDAG.cpp | [all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | 806 setOperationAction(ISD::BITREVERSE, VT, Expand);
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIISelLowering.cpp | 110 setOperationAction(ISD::BITREVERSE, MVT::i32, Legal);
[all...] |
| AMDGPUISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
