/external/clang/test/Parser/ |
MicrosoftExtensionsInlineAsm.c | 5 void __forceinline InterlockedBitTestAndSet (long *Base, long Bit) 8 mov eax, Bit
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/external/vixl/src/vixl/a64/ |
decoder-a64.cc | 161 // We know bit 28 is set, as <b28:b27> = 0 is filtered out at the top level 163 VIXL_ASSERT(instr->Bit(28) == 0x1); 182 if (instr->Bit(25) == 0) { 190 if (instr->Bit(25) == 0) { 191 if ((instr->Bit(24) == 0x1) || 203 if (instr->Bit(25) == 0) { 204 if (instr->Bit(24) == 0) { 247 if ((instr->Bit(24) == 0x1) || 275 if ((instr->Bit(28) == 0) && (instr->Bit(29) == 0) && (instr->Bit(26) == 1)) [all...] |
macro-assembler-a64.cc | 105 // Marker indicating the size of the literal pool in 32-bit words. 364 // The worst case for size is mov 64-bit immediate to sp: 373 // 1. 64-bit move zero (movz). 374 // 2. 32-bit move inverted (movn). 375 // 3. 64-bit move inverted. 376 // 4. 32-bit orr immediate. 377 // 5. 64-bit orr immediate. 378 // Move-keep may then be used to modify each of the 16-bit half words. 487 void MacroAssembler::B(Label* label, BranchType type, Register reg, int bit) { 489 ((bit == -1) || (type >= kBranchTypeFirstUsingBit))) [all...] |
/art/compiler/utils/arm/ |
constants_arm.h | 149 BIC = 14, // Bit Clear 259 // Read one particular bit out of the instruction bits. 260 int Bit(int nr) const { 264 // Read a bit field out of the instruction bits. 294 int RegShiftField() const { return Bit(4); } 306 int BField() const { return Bit(22); } 307 int WField() const { return Bit(21); } 308 int LField() const { return Bit(20); } 316 int SignField() const { return Bit(6); } 317 int HField() const { return Bit(5); [all...] |
/external/v8/src/arm/ |
constants-arm.h | 131 // Instr is merely used by the Assembler to distinguish 32bit integers 132 // representing instructions from usual 32 bit values. 133 // Instruction objects are pointers to 32bit values, and provide methods to 155 BIC = 14 << 21, // Bit Clear. 160 // The bits for bit 7-4 for some type 0 miscellaneous instructions. 208 // Instruction bit masks. 289 // Bit encoding P U W. 301 // Bit encoding P U W . 359 // svc (formerly swi) provides a 24bit immediate value. Use bits 22:0 for 360 // standard SoftwareInterrupCode. Bit 23 is reserved for the stop feature [all...] |
constants-arm.cc | 23 high16 |= (0xff * Bit(18)) << 6; // xxbbbbbb,bbxxxxxx. 24 high16 |= (Bit(18) ^ 1) << 14; // xBxxxxxx,xxxxxxxx. 25 high16 |= Bit(19) << 15; // axxxxxxx,xxxxxxxx.
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simulator-arm.cc | [all...] |
disasm-arm.cc | 96 // Each of these functions decodes one particular instruction type, a 3-bit 240 shift_names[instr->Bit(6) * 2], 329 // Print register list in ascending order, by scanning the bit mask. 364 (instr->Bit(24) == 0x0) && 366 (instr->Bit(4) == 0x1)) { 368 reg = instr->Bits(19, 16) | (instr->Bit(7) << 4); 451 if (instr->Bit(21) == 0) { 477 if (instr->Bit(21) == 0) { 479 // Bits 20-16 represent most-significant bit. Covert to width. 527 if ((instr->Bits(27, 25) == 0) && (instr->Bit(20) == 0) & [all...] |
/external/v8/src/arm64/ |
decoder-arm64-inl.h | 100 // We know bit 28 is set, as <b28:b27> = 0 is filtered out at the top level 102 DCHECK(instr->Bit(28) == 0x1); 122 if (instr->Bit(25) == 0) { 130 if (instr->Bit(25) == 0) { 131 if ((instr->Bit(24) == 0x1) || 143 if (instr->Bit(25) == 0) { 144 if (instr->Bit(24) == 0) { 187 if ((instr->Bit(24) == 0x1) || 216 if (instr->Bit(24) == 0) { 217 if (instr->Bit(28) == 0) [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/m68hc11/ |
malis-include.s | 6 ;; SPECIFICATION FOR Motorola 8- and 16-Bit ASSEMBLY LANGUAGE INPUT STANDARD
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/external/v8/src/ppc/ |
simulator-ppc.cc | 436 intptr_t words; // likely inaccurate variable name for 64bit 1906 uintptr_t bit = 0x80000000; local 1921 uintptr_t bit = 0x8000000000000000UL; local 2240 uintptr_t bit = 0x80000000; local 2266 uintptr_t bit = 0x8000000000000000UL; local 3297 uintptr_t bit = 0x8000000000000000 >> mb; local 3305 uintptr_t bit = 0x8000000000000000 >> (me + 1); \/\/ needs to be tested local 3511 int bit = 0x80000000 >> mb; local 3519 int bit = 0x80000000 >> (me + 1); \/\/ needs to be tested local 3553 int bit = 0x80000000 >> mb; local 3561 int bit = 0x80000000 >> (me + 1); \/\/ needs to be tested local [all...] |
disasm-ppc.cc | 205 if (instr->Bit(10) == 1) { 211 if (instr->Bit(0) == 1) { 235 // Link (LK) Bit 0 236 if (instr->Bit(0) == 1) { 242 // Absolute Address Bit 1 243 if (instr->Bit(1) == 1) { 280 value = (sh | (instr->Bit(1) << 5)); 296 value = (instr->Bits(10, 6) | (instr->Bit(5) << 5)); 304 value = (instr->Bits(10, 6) | (instr->Bit(5) << 5)); 483 if (instr->Bit(0) == 1) [all...] |
constants-ppc.h | 90 // Instr is merely used by the Assembler to distinguish 32bit integers 91 // representing instructions from usual 32 bit values. 92 // Instruction objects are pointers to 32bit values, and provide methods to 96 // Opcodes as defined in section 4.2 table 34 (32bit PowerPC) 120 EXT5 = 30 << 26, // Extended code set 5 - 64bit only 282 MTFSB1 = 38 << 1, // Move to FPSCR Bit 1 285 MTFSB0 = 70 << 1, // Move to FPSCR Bit 0 316 // Instruction encoding bit 341 // Instruction bit masks 372 // Record bit [all...] |
/toolchain/binutils/binutils-2.25/gold/testsuite/ |
thumb_blx_out_of_range.s | 44 # Bit 1 of the BLX target comes from bit 1 of branch base address,
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/external/llvm/include/llvm/TableGen/ |
Record.h | 80 /// BitRecTy - 'bit' - Represent a single bit 93 std::string getAsString() const override { return "bit"; } 232 /// We could pack these a bit tighter by not having the IK_FirstXXXInit 298 /// the bit subscript operator on this initializer, return null. 342 /// bit. 343 virtual Init *getBit(unsigned Bit) const = 0; 345 /// getBitVar - This method is used to retrieve the initializer for bit 349 /// getBitNum - This method is used to retrieve the bit number of a bit [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/d30v/ |
bittest.s | 3 # Bit operation instructions (BCLR, BNOT, BSET, BTST) should not be placed in IU.
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bittest.l | 12 3 # Bit operation instructions \(BCLR, BNOT, BSET, BTST\) should not be placed in IU.
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/external/v8/test/mjsunit/ |
random-bit-correlations.js | 24 // The predicted bit is one of the bits from the PRNG. 27 // We don't want to check whether each bit predicts itself. 33 // Find out how many of the bits are the same as the prediction bit. 44 var bit = (history[0] >> random_bit) & 1; 45 if (bit == predicted) m++; 54 print(`Bit ${random_bit} is ${bit_value} ${percent}% of the time`); 56 print(`Bit ${random_bit} is the same as bit ${predictor_bit} ` + 63 // If the predictor bit is a fixed 0 or 1 then it makes no sense to
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/external/llvm/lib/Transforms/IPO/ |
LowerBitSets.cpp | 119 // allows us to compress the bitset by only storing one bit per aligned 178 unsigned Bit = 0; 180 if (BitAllocs[I] < BitAllocs[Bit]) 181 Bit = I; 183 AllocByteOffset = BitAllocs[Bit]; 187 BitAllocs[Bit] = ReqSize; 192 AllocMask = 1 << Bit; 297 /// Build a bit set for BitSet using the object layouts in 329 /// Build a test that bit BitOffset mod sizeof(Bits)*8 is set in 414 /// Build a test that bit BitOffset is set in BSI, wher [all...] |
/external/llvm/lib/Fuzzer/ |
FuzzerMutate.cpp | 51 int Bit = Rand(8); 52 char Mask = 1 << Bit; 54 if (X & (1 << Bit))
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/external/llvm/lib/DebugInfo/DWARF/ |
DWARFDebugInfoEntry.cpp | 85 uint64_t Bit = 1ULL << Shift; 86 if (const char *PropName = ApplePropertyString(Bit)) 89 OS << format("DW_APPLE_PROPERTY_0x%" PRIx64, Bit); 90 if (!(Val ^= Bit))
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/external/llvm/lib/TableGen/ |
TGLexer.h | 46 Bit, Bits, Class, Code, Dag, Def, Foreach, Defm, Field, In, Int, Let, List,
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Record.cpp | 250 // Can only convert single bit. 289 if (getNumBits() != 1) return nullptr; // Only accept if just one bit! 303 if (auto *Bit = dyn_cast<BitInit>(getBit(i))) 304 Result |= static_cast<int64_t>(Bit->getValue()) << i; 329 if (Init *Bit = getBit(e-i-1)) 330 Result += Bit->getAsString(); 337 // Fix bit initializer to preserve the behavior that bit reference from a unset 338 // bits initializer will resolve into VarBitInit to keep the field name and bit 365 Init *Bit = CachedInit->getBit(CurBit->getBitNum()) [all...] |
/external/webrtc/webrtc/common_audio/signal_processing/ |
complex_bit_reverse_arm.S | 13 @ Reference C code is in file complex_bit_reverse.c. Bit-exact. 87 @ The index tables. Note the values are doubles of the actual indexes for 16-bit
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/crx/ |
bit_insn.s | 0 # Bit instructions.
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