| /toolchain/binutils/binutils-2.25/opcodes/ |
| tic54x-opc.c | 117 #define CC1 0x40
133 { "aeq", CC1|CCEQ }, { "AEQ", CC1|CCEQ },
134 { "aneq", CC1|CCNEQ }, { "ANEQ", CC1|CCNEQ },
135 { "alt", CC1|CCLT }, { "ALT", CC1|CCLT },
136 { "aleq", CC1|CCLEQ }, { "ALEQ", CC1|CCLEQ },
137 { "agt", CC1|CCGT }, { "AGT", CC1|CCGT }
[all...] |
| /external/clang/test/CXX/concepts-ts/dcl.dcl/dcl.spec/dcl.spec.concept/ |
| p1.cpp | 33 concept class CC1 {}; // expected-error {{'concept' can only appear on the definition of a function template or variable template}}
|
| /external/valgrind/cachegrind/ |
| cg_diff.in | 293 while (my ($filefuncname, $CC1) = each(%$CCs1)) {
297 sub_array_b_from_a($CC2, $CC1); # CC2 -= CC1
300 sub_array_b_from_a($CC2, $CC1); # CC2 -= CC1
|
| /external/icu/icu4c/source/config/ |
| mh-os400 | 10 GEN_DEPS.c= $(CC1) -E -M $(DEFS) $(CPPFLAGS)
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeDAG.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | 483 ARMCC::CondCodes CC1 = (ARMCC::CondCodes)Pred1[0].getImm();
485 if (CC1 == CC2)
488 switch (CC1) {
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
