| /prebuilts/go/darwin-x86/src/cmd/dist/ |
| cpuid_386.s | 7 TEXT ·cpuid(SB),$0-8
9 CPUID
|
| cpuid_amd64.s | 7 TEXT ·cpuid(SB),$0-12
9 CPUID
|
| /prebuilts/go/linux-x86/src/cmd/dist/ |
| cpuid_386.s | 7 TEXT ·cpuid(SB),$0-8
9 CPUID
|
| cpuid_amd64.s | 7 TEXT ·cpuid(SB),$0-12
9 CPUID
|
| /external/mesa3d/src/mesa/x86/ |
| common_x86_asm.S | 26 * Check extended CPU capabilities. Now justs returns the raw CPUID
53 /* Test for the CPUID command. If the ID Flag bit in EFLAGS
54 * (bit 21) is writable, the CPUID command is present */
77 MOV_L (REGOFF(4, ESP), EAX) /* cpuid op */
81 CPUID
101 MOV_L (REGOFF(4, ESP), EAX) /* cpuid op */
104 CPUID
114 MOV_L (REGOFF(4, ESP), EAX) /* cpuid op */
117 CPUID
128 MOV_L (REGOFF(4, ESP), EAX) /* cpuid op *
[all...] |
| /prebuilts/go/darwin-x86/src/hash/crc32/ |
| crc32_amd64.s | 59 CPUID
|
| crc32_amd64p32.s | 59 CPUID
|
| /prebuilts/go/linux-x86/src/hash/crc32/ |
| crc32_amd64.s | 59 CPUID
|
| crc32_amd64p32.s | 59 CPUID
|
| /device/google/contexthub/firmware/inc/platform/stm32f4xx/cmsis/ |
| core_cm0.h | 336 __I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
347 /* SCB CPUID Register Definitions */
348 #define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
349 #define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
351 #define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
352 #define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
354 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
355 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
357 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
[all...] |
| core_cm0plus.h | 347 __I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
362 /* SCB CPUID Register Definitions */
363 #define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
364 #define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
366 #define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
367 #define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
369 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
370 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
372 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
[all...] |
| core_sc000.h | 342 __I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
355 /* SCB CPUID Register Definitions */
356 #define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
357 #define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
359 #define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
360 #define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
362 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
363 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
365 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
[all...] |
| core_cm3.h | 350 __I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
373 /* SCB CPUID Register Definitions */
374 #define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
375 #define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
377 #define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
378 #define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
380 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
381 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
383 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
[all...] |
| core_cm4.h | 397 __I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
420 /* SCB CPUID Register Definitions */
421 #define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
422 #define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
424 #define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
425 #define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
427 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
428 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
430 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
[all...] |
| core_sc300.h | 350 __I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
373 /* SCB CPUID Register Definitions */
374 #define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
375 #define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
377 #define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
378 #define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
380 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
381 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
383 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
[all...] |
| core_cm7.h | 412 __I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
464 /* SCB CPUID Register Definitions */
465 #define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
466 #define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
468 #define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
469 #define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
471 #define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
472 #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
474 #define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
[all...] |
| /prebuilts/go/darwin-x86/src/crypto/aes/ |
| asm_amd64.s | 12 CPUID
|
| /prebuilts/go/linux-x86/src/crypto/aes/ |
| asm_amd64.s | 12 CPUID
|
| /prebuilts/go/darwin-x86/src/runtime/ |
| asm_amd64p32.s | 32 CPUID
36 CPUID
|
| asm_386.s | 30 CPUID
47 CPUID
[all...] |
| asm_amd64.s | 30 CPUID
47 CPUID
[all...] |
| /prebuilts/go/linux-x86/src/runtime/ |
| asm_amd64p32.s | 32 CPUID
36 CPUID
|
| asm_386.s | 30 CPUID
47 CPUID
[all...] |
| asm_amd64.s | 30 CPUID
47 CPUID
[all...] |
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| convex.h | 64 #define CPUID 20
88 "cpuid",
996 {0,0,lr,CPUID,S,0}, /* mov */
[all...] |
