/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 342 CTTZ_ZERO_UNDEF, CTLZ_ZERO_UNDEF, [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 120 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i8, Expand); 121 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i16, Expand); [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 319 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
|
LegalizeVectorOps.cpp | 288 case ISD::CTTZ_ZERO_UNDEF: [all...] |
LegalizeIntegerTypes.cpp | 65 case ISD::CTTZ_ZERO_UNDEF: [all...] |
LegalizeDAG.cpp | [all...] |
LegalizeVectorTypes.cpp | 76 case ISD::CTTZ_ZERO_UNDEF: 630 case ISD::CTTZ_ZERO_UNDEF: [all...] |
SelectionDAG.cpp | [all...] |
DAGCombiner.cpp | [all...] |
SelectionDAGBuilder.cpp | [all...] |
/external/llvm/lib/Target/BPF/ |
BPFISelLowering.cpp | 140 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Custom);
|
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | 596 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v8i8, Custom); 597 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v4i16, Custom); 598 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v2i32, Custom); 599 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v1i64, Custom); 601 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v16i8, Custom); 602 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v8i16, Custom); 603 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v4i32, Custom); 604 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v2i64, Custom); [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | 337 setOperationAction(ISD::CTTZ_ZERO_UNDEF , MVT::i8 , Promote); 338 AddPromotedToType (ISD::CTTZ_ZERO_UNDEF , MVT::i8 , MVT::i32); 340 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i16 , Expand); 341 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32 , Expand); 343 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand); 727 setOperationAction(ISD::CTTZ_ZERO_UNDEF, VT, Expand); [all...] |
/external/llvm/lib/Target/NVPTX/ |
NVPTXISelLowering.cpp | 266 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i16, Expand); 267 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); 268 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand); [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 113 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/AMDGPU/ |
AMDGPUISelLowering.cpp | 289 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); 330 setOperationAction(ISD::CTTZ_ZERO_UNDEF, VT, Expand); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | 344 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); 345 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand); [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 187 setOperationAction(ISD::CTTZ_ZERO_UNDEF, VT, Expand); 313 setOperationAction(ISD::CTTZ_ZERO_UNDEF, VT, Custom); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 210 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); 214 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand); 484 setOperationAction(ISD::CTTZ_ZERO_UNDEF, VT, Expand); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | 230 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); 232 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand); [all...] |