| /external/lzma/CPP/Common/ |
| MyTypes.h | 13 bool Def;
15 CBoolPair(): Val(false), Def(false) {}
20 Def = false;
26 Def = true;
|
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyLowerBrUnless.cpp | 75 MachineInstr *Def = MRI.getVRegDef(Cond);
76 switch (Def->getOpcode()) {
78 case EQ_I32: Def->setDesc(TII.get(NE_I32)); Inverted = true; break;
79 case NE_I32: Def->setDesc(TII.get(EQ_I32)); Inverted = true; break;
80 case GT_S_I32: Def->setDesc(TII.get(LE_S_I32)); Inverted = true; break;
81 case GE_S_I32: Def->setDesc(TII.get(LT_S_I32)); Inverted = true; break;
82 case LT_S_I32: Def->setDesc(TII.get(GE_S_I32)); Inverted = true; break;
83 case LE_S_I32: Def->setDesc(TII.get(GT_S_I32)); Inverted = true; break;
84 case GT_U_I32: Def->setDesc(TII.get(LE_U_I32)); Inverted = true; break;
85 case GE_U_I32: Def->setDesc(TII.get(LT_U_I32)); Inverted = true; break
[all...] |
| WebAssemblyRegStackify.cpp | 95 MachineInstr *Def = MRI.getVRegDef(Reg);
96 if (Def->getOpcode() == TargetOpcode::PHI)
98 ImposeStackInputOrdering(Def);
102 // Test whether it's safe to move Def to just before Insert. Note that this
109 static bool IsSafeToMove(const MachineInstr *Def, const MachineInstr *Insert,
111 assert(Def->getParent() == Insert->getParent());
113 MachineBasicBlock::const_iterator D(Def), I(Insert);
117 return !(SawStore && Def->mayLoad() && !Def->isInvariantLoad(&AA)) &&
118 !(SawSideEffects && !Def->isSafeToMove(&AA, SawStore))
[all...] |
| /external/clang/test/Modules/Inputs/ |
| def.h | 1 #include "def-include.h"
11 @interface Def
|
| /external/llvm/lib/CodeGen/ |
| PeepholeOptimizer.cpp | 146 /// \brief Track Def -> Use info used for rewriting copies.
278 /// follows the use-def chain to find successive suitable sources.
280 /// def = COPY src.
285 /// def = COPY v2.sub0
287 /// Using a ValueTracker for def = COPY v2.sub0 will give the following
290 /// Then, def can be rewritten into def = COPY v0.
293 /// The current point into the use-def chain.
294 const MachineInstr *Def;
295 /// The index of the definition in Def
[all...] |
| MachineCopyPropagation.cpp | 113 static bool isNopCopy(MachineInstr *CopyMI, unsigned Def, unsigned Src,
116 if (Def == SrcSrc)
118 if (TRI->isSubRegister(SrcSrc, Def)) {
120 unsigned SubIdx = TRI->getSubRegIndex(SrcSrc, Def);
131 DenseMap<unsigned, MachineInstr*> AvailCopyMap; // Def -> available copies map
132 DenseMap<unsigned, MachineInstr*> CopyMap; // Def -> copies map
133 SourceMap SrcMap; // Src -> Def map
143 unsigned Def = MI->getOperand(0).getReg();
146 if (TargetRegisterInfo::isVirtualRegister(Def) ||
154 if (!MRI->isReserved(Def) &
[all...] |
| /external/llvm/lib/IR/ |
| Dominators.cpp | 74 // dominates - Return true if Def dominates a use in User. This performs
75 // the special checks necessary if Def and User are in the same basic block.
76 // Note that Def doesn't dominate a use in Def itself!
77 bool DominatorTree::dominates(const Instruction *Def,
80 const BasicBlock *DefBB = Def->getParent();
82 // Any unreachable use is dominated, even if Def == User.
91 if (Def == User)
98 if (isa<InvokeInst>(Def) || isa<PHINode>(User))
99 return dominates(Def, UseBB)
[all...] |
| /external/llvm/examples/OCaml-Kaleidoscope/Chapter2/ |
| token.ml | 9 | Def | Extern
|
| /external/llvm/examples/OCaml-Kaleidoscope/Chapter3/ |
| token.ml | 9 | Def | Extern
|
| /external/llvm/examples/OCaml-Kaleidoscope/Chapter4/ |
| token.ml | 9 | Def | Extern
|
| /external/google-breakpad/src/testing/gtest/test/ |
| gtest_list_tests_unittest_.cc | 58 TEST(Abc, Def) {
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64AdvSIMDScalarPass.cpp | 217 MachineRegisterInfo::def_instr_iterator Def =
219 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!");
220 Src0 = getSrcFromCopy(&*Def, MRI, SubReg0);
230 MachineRegisterInfo::def_instr_iterator Def =
232 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!");
233 Src1 = getSrcFromCopy(&*Def, MRI, SubReg1);
310 MachineRegisterInfo::def_instr_iterator Def =
312 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!")
[all...] |
| AArch64CollectLOH.cpp | 210 /// mapping def to reachable uses or use to definitions.
304 // Treat ADRP def as use, as the goal of the analysis is to find
384 /// Reaching def core algorithm:
436 /// def algorithm.
437 /// \param ADRPMode specify whether the reaching def algorithm should be tuned
483 DEBUG(dbgs() << "Def:\n");
494 /// Answer the following question: Can Def be one of the definition
496 static bool canDefBePartOfLOH(const MachineInstr *Def) {
497 unsigned Opc = Def->getOpcode();
506 switch (Def->getOperand(2).getType())
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenSchedule.h | 61 CodeGenSchedRW(unsigned Idx, Record *Def)
62 : Index(Idx), TheDef(Def), IsAlias(false), IsVariadic(false) {
63 Name = Def->getName();
64 IsRead = Def->isSubClassOf("SchedRead");
65 HasVariants = Def->isSubClassOf("SchedVariant");
67 IsVariadic = Def->getValueAsBit("Variadic");
72 IsSequence = Def->isSubClassOf("WriteSequence");
83 assert((!HasVariants || TheDef) && "Variant write needs record def");
323 CodeGenSchedRW &getSchedRW(Record *Def) {
324 bool IsRead = Def->isSubClassOf("SchedRead")
[all...] |
| /external/clang/lib/Lex/ |
| MacroInfo.cpp | 202 for (DefInfo Def = getDefinition(); Def; Def = Def.getPreviousDefinition()) {
203 if (Def.getLocation().isInvalid() || // For macros defined on the command line.
204 SM.isBeforeInTranslationUnit(Def.getLocation(), L))
205 return (!Def.isUndefined() ||
206 SM.isBeforeInTranslationUnit(L, Def.getUndefLocation()))
207 ? Def : DefInfo();
|
| /external/protobuf/gtest/test/ |
| gtest_list_tests_unittest_.cc | 58 TEST(Abc, Def) {
|
| /external/llvm/examples/OCaml-Kaleidoscope/Chapter5/ |
| token.ml | 9 | Def | Extern
|
| /external/llvm/examples/OCaml-Kaleidoscope/Chapter6/ |
| token.ml | 9 | Def | Extern
|
| /external/llvm/examples/OCaml-Kaleidoscope/Chapter7/ |
| token.ml | 9 | Def | Extern
|
| /prebuilts/gdb/darwin-x86/lib/python2.7/test/ |
| test_string.py | 12 def checkequal(self, result, object, methodname, *args):
19 def checkraises(self, exc, object, methodname, *args):
27 def checkcall(self, object, methodname, *args):
30 def test_join(self):
55 def f():
69 def test_attrs(self):
80 def test_atoi(self):
85 def test_atol(self):
90 def test_atof(self):
95 def test_maketrans(self)
[all...] |
| /prebuilts/gdb/linux-x86/lib/python2.7/test/ |
| test_string.py | 12 def checkequal(self, result, object, methodname, *args):
19 def checkraises(self, exc, object, methodname, *args):
27 def checkcall(self, object, methodname, *args):
30 def test_join(self):
55 def f():
69 def test_attrs(self):
80 def test_atoi(self):
85 def test_atol(self):
90 def test_atof(self):
95 def test_maketrans(self)
[all...] |
| /prebuilts/python/darwin-x86/2.7.5/lib/python2.7/test/ |
| test_string.py | 12 def checkequal(self, result, object, methodname, *args):
19 def checkraises(self, exc, object, methodname, *args):
27 def checkcall(self, object, methodname, *args):
30 def test_join(self):
55 def f():
69 def test_attrs(self):
80 def test_atoi(self):
85 def test_atol(self):
90 def test_atof(self):
95 def test_maketrans(self)
[all...] |
| /prebuilts/python/linux-x86/2.7.5/lib/python2.7/test/ |
| test_string.py | 12 def checkequal(self, result, object, methodname, *args):
19 def checkraises(self, exc, object, methodname, *args):
27 def checkcall(self, object, methodname, *args):
30 def test_join(self):
55 def f():
69 def test_attrs(self):
80 def test_atoi(self):
85 def test_atol(self):
90 def test_atof(self):
95 def test_maketrans(self)
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIFixSGPRLiveRanges.cpp | 13 /// The main case we need to handle is when a def is used in one side of a
16 /// %def
26 /// inside of the IF to the same register as %def. In traditional live
27 /// interval analysis %def is not live inside the IF branch, however, since
30 /// value of %def, so the use in ELSE will see the wrong value.
34 /// %def
44 /// Adding this use will make the def live throughout the IF branch, which is
130 // We should never see a live out def of a physical register, so we also
132 unsigned Def = MO.getReg();
133 if (TargetRegisterInfo::isVirtualRegister(Def)) {
[all...] |
| /external/llvm/lib/Target/ARM/ |
| A15SDOptimizer.cpp | 209 MachineInstr *Def = Op->getParent();
213 if (DeadInstr.find(Def) != DeadInstr.end())
220 for (unsigned int j = 0; j < Def->getNumOperands(); ++j) {
221 MachineOperand &MODef = Def->getOperand(j);
233 if (&*II == Def)
244 DEBUG(dbgs() << "Deleting instruction " << *Def << "\n");
245 DeadInstr.insert(Def);
314 MachineInstr *Def = MRI->getVRegDef(OpReg);
315 if (!Def)
317 if (Def->isImplicitDef()
[all...] |
