/external/llvm/utils/TableGen/ |
CallingConvEmitter.cpp | 223 MVT::SimpleValueType DestVT = getValueType(DestTy); 224 O << IndentStr << "LocVT = " << getEnumName(DestVT) <<";\n"; 225 if (MVT(DestVT).isFloatingPoint()) { 237 MVT::SimpleValueType DestVT = getValueType(DestTy); 238 O << IndentStr << "LocVT = " << getEnumName(DestVT) << ";\n"; 239 if (MVT(DestVT).isFloatingPoint()) {
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/external/llvm/lib/Target/Mips/ |
MipsFastISel.cpp | 126 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt); 127 bool emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg, 130 bool emitIntZExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg); 132 bool emitIntSExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg); 133 bool emitIntSExt32r1(MVT SrcVT, unsigned SrcReg, MVT DestVT, 135 bool emitIntSExt32r2(MVT SrcVT, unsigned SrcReg, MVT DestVT, 940 EVT DestVT = TLI.getValueType(DL, I->getType(), true); 942 if (SrcVT != MVT::f32 || DestVT != MVT::f64) 1014 EVT DestVT = TLI.getValueType(DL, I->getType(), true); 1016 if (SrcVT != MVT::f64 || DestVT != MVT::f32 [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCFastISel.cpp | 163 bool PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, 898 EVT DestVT = TLI.getValueType(DL, I->getType(), true); 900 if (SrcVT != MVT::f32 || DestVT != MVT::f64) 916 EVT DestVT = TLI.getValueType(DL, I->getType(), true); 918 if (SrcVT != MVT::f64 || DestVT != MVT::f32) [all...] |
PPCISelLowering.cpp | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64FastISel.cpp | 189 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt); 190 unsigned emiti1Ext(unsigned SrcReg, MVT DestVT, bool isZExt); [all...] |
AArch64ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMFastISel.cpp | 181 unsigned ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt); [all...] |
ARMISelLowering.cpp | [all...] |
/external/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeDAG.cpp | 131 SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT, SDLoc dl); 141 SDValue ExpandLegalINT_TO_FP(bool isSigned, SDValue LegalOp, EVT DestVT, 143 SDValue PromoteLegalINT_TO_FP(SDValue LegalOp, EVT DestVT, bool isSigned, 145 SDValue PromoteLegalFP_TO_INT(SDValue LegalOp, EVT DestVT, bool isSigned, [all...] |
SelectionDAGBuilder.cpp | [all...] |
LegalizeTypes.cpp | [all...] |
LegalizeVectorTypes.cpp | 246 EVT DestVT = N->getValueType(0).getVectorElementType(); 265 return DAG.getNode(N->getOpcode(), SDLoc(N), DestVT, Op); [all...] |
LegalizeTypes.h | 172 SDValue CreateStackStoreLoad(SDValue Op, EVT DestVT); [all...] |
/external/llvm/lib/Target/AMDGPU/ |
AMDGPUISelDAGToDAG.cpp | [all...] |
AMDGPUISelLowering.cpp | 548 bool AMDGPUTargetLowering::isNarrowingProfitable(EVT SrcVT, EVT DestVT) const { 555 return SrcVT.getSizeInBits() > 32 && DestVT.getSizeInBits() == 32; [all...] |
/external/llvm/include/llvm/Target/ |
TargetLowering.h | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |