| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 293 /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an
296 EXTRACT_SUBVECTOR,
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorTypes.cpp | 55 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
600 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
833 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
835 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
[all...] |
| SelectionDAGDumper.cpp | 221 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
|
| LegalizeIntegerTypes.cpp | 92 case ISD::EXTRACT_SUBVECTOR:
[all...] |
| SelectionDAG.cpp | [all...] |
| SelectionDAGBuilder.cpp | 321 ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
568 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, IntermediateVT, Val,
[all...] |
| DAGCombiner.cpp | [all...] |
| LegalizeDAG.cpp | [all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | 175 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v2f32, Custom);
176 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v2i32, Custom);
177 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v4f32, Custom);
178 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v4i32, Custom);
179 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v8f32, Custom);
180 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v8i32, Custom);
620 case ISD::EXTRACT_SUBVECTOR: return LowerEXTRACT_SUBVECTOR(Op, DAG);
[all...] |
| SIISelLowering.cpp | 215 case ISD::EXTRACT_SUBVECTOR:
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 666 setOperationAction(ISD::EXTRACT_SUBVECTOR, VT.getSimpleVT(), Custom);
[all...] |
| AArch64ISelDAGToDAG.cpp | 427 if (EV.getOpcode() != ISD::EXTRACT_SUBVECTOR)
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 117 setOperationAction(ISD::EXTRACT_SUBVECTOR, VT, Legal);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 701 setOperationAction(ISD::EXTRACT_SUBVECTOR, VT,Expand);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 681 setOperationAction(ISD::EXTRACT_SUBVECTOR , MVT::v4f64, Expand);
731 setOperationAction(ISD::EXTRACT_SUBVECTOR , MVT::v4f32, Expand);
[all...] |
