| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 250 /// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This
253 /// FCOPYSIGN(f32, f64) is allowed.
254 FCOPYSIGN,
[all...] |
| BasicTTIImpl.h | 651 ISD = ISD::FCOPYSIGN;
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeFloatTypes.cpp | 81 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N, ResNo); break;
231 // When LegalInHWReg, FCOPYSIGN can be implemented as native bitwise operations.
[all...] |
| LegalizeVectorTypes.cpp | 107 case ISD::FCOPYSIGN:
604 case ISD::FCOPYSIGN: SplitVecRes_FCOPYSIGN(N, Lo, Hi); break;
[all...] |
| SelectionDAGDumper.cpp | 203 case ISD::FCOPYSIGN: return "fcopysign";
|
| LegalizeVectorOps.cpp | 306 case ISD::FCOPYSIGN:
[all...] |
| LegalizeDAG.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | 215 // fcopysign can be done in a single instruction with BFI.
216 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand);
217 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand);
365 setOperationAction(ISD::FCOPYSIGN, VT, Expand);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 285 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom);
286 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | 813 setOperationAction(ISD::FCOPYSIGN, VT, Expand);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 151 setOperationAction(ISD::FCOPYSIGN, MVT::f128, Expand);
271 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom);
272 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom);
288 setOperationAction(ISD::FCOPYSIGN, MVT::f16, Promote);
330 setOperationAction(ISD::FCOPYSIGN, MVT::v4f16, Expand);
360 setOperationAction(ISD::FCOPYSIGN, MVT::v8f16, Expand);
533 setOperationAction(ISD::FCOPYSIGN, MVT::v1f64, Expand);
658 // But we do support custom-lowering for FCOPYSIGN.
659 setOperationAction(ISD::FCOPYSIGN, VT.getSimpleVT(), Custom);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 188 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Legal);
189 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Legal);
191 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand);
192 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand);
665 setOperationAction(ISD::FCOPYSIGN, MVT::v4f64, Legal);
718 setOperationAction(ISD::FCOPYSIGN, MVT::v4f32, Legal);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 494 setOperationAction(ISD::FCOPYSIGN, MVT::v2f64, Expand);
656 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 538 // Use ANDPD and ORPD to simulate FCOPYSIGN.
539 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom);
540 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom);
572 // Use ANDPS and ORPS to simulate FCOPYSIGN.
573 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand);
574 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom);
601 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand);
602 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand);
633 setOperationAction(ISD::FCOPYSIGN, MVT::f128, Custom);
638 setOperationAction(ISD::FCOPYSIGN, MVT::f80, Expand)
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
