/external/mesa3d/src/gallium/drivers/radeon/ |
AMDGPUISelLowering.cpp | 36 setOperationAction(ISD::FEXP2, MVT::f32, Legal); 113 return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1));
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/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 512 /// FLOG, FLOG2, FLOG10, FEXP, FEXP2, 516 FLOG, FLOG2, FLOG10, FEXP, FEXP2, [all...] |
BasicTTIImpl.h | 630 ISD = ISD::FEXP2;
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/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 169 case ISD::FEXP2: return "fexp2";
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LegalizeVectorOps.cpp | 316 case ISD::FEXP2: [all...] |
LegalizeFloatTypes.cpp | 85 case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break; [all...] |
LegalizeVectorTypes.cpp | 81 case ISD::FEXP2: 636 case ISD::FEXP2: [all...] |
LegalizeDAG.cpp | [all...] |
SelectionDAGBuilder.cpp | [all...] |
/external/llvm/lib/Target/AMDGPU/ |
AMDGPUISelLowering.cpp | 85 setOperationAction(ISD::FEXP2, MVT::f32, Legal); 348 setOperationAction(ISD::FEXP2, VT, Expand); [all...] |
/external/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | [all...] |
/external/llvm/lib/Target/Mips/ |
MipsSEISelLowering.cpp | 313 setOperationAction(ISD::FEXP2, Ty, Legal); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | 299 setOperationAction(ISD::FEXP2, MVT::f16, Promote); 350 setOperationAction(ISD::FEXP2, MVT::v4f16, Expand); 384 setOperationAction(ISD::FEXP2, MVT::v8f16, Expand); 656 setOperationAction(ISD::FEXP2, VT.getSimpleVT(), Expand); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | 510 setOperationAction(ISD::FEXP2, MVT::v2f64, Expand); 528 setOperationAction(ISD::FEXP2, MVT::v4f32, Expand); 545 setOperationAction(ISD::FEXP2, MVT::v2f32, Expand); 669 setOperationAction(ISD::FEXP2, MVT::f64, Expand); [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 460 setOperationAction(ISD::FEXP2, VT, Expand); 703 setOperationAction(ISD::FEXP2 , MVT::v4f64, Expand); [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | 677 setOperationAction(ISD::FEXP2, MVT::f80, Expand); [all...] |