| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 512 /// FLOG, FLOG2, FLOG10, FEXP, FEXP2,
516 FLOG, FLOG2, FLOG10, FEXP, FEXP2,
[all...] |
| BasicTTIImpl.h | 636 ISD = ISD::FLOG10;
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 172 case ISD::FLOG10: return "flog10";
|
| LegalizeVectorOps.cpp | 314 case ISD::FLOG10:
[all...] |
| LegalizeFloatTypes.cpp | 89 case ISD::FLOG10: R = SoftenFloatRes_FLOG10(N); break;
[all...] |
| LegalizeVectorTypes.cpp | 84 case ISD::FLOG10:
639 case ISD::FLOG10:
[all...] |
| LegalizeDAG.cpp | [all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 302 setOperationAction(ISD::FLOG10, MVT::f16, Promote);
353 setOperationAction(ISD::FLOG10, MVT::v4f16, Expand);
387 setOperationAction(ISD::FLOG10, MVT::v8f16, Expand);
654 setOperationAction(ISD::FLOG10, VT.getSimpleVT(), Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 508 setOperationAction(ISD::FLOG10, MVT::v2f64, Expand);
526 setOperationAction(ISD::FLOG10, MVT::v4f32, Expand);
543 setOperationAction(ISD::FLOG10, MVT::v2f32, Expand);
667 setOperationAction(ISD::FLOG10, MVT::f64, Expand);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 370 setOperationAction(ISD::FLOG10, MVT::f32, Expand);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 457 setOperationAction(ISD::FLOG10, VT, Expand);
701 setOperationAction(ISD::FLOG10 , MVT::v4f64, Expand);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 675 setOperationAction(ISD::FLOG10, MVT::f80, Expand);
[all...] |
