/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 524 /// FMINNAN/FMAXNAN - Behave identically to FMINNUM/FMAXNUM, except that 526 FMINNAN, FMAXNAN, [all...] |
SelectionDAG.h | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 156 case ISD::FMAXNAN: return "fmaxnan";
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LegalizeVectorOps.cpp | 305 case ISD::FMAXNAN: [all...] |
LegalizeVectorTypes.cpp | 113 case ISD::FMAXNAN: 673 case ISD::FMAXNAN: [all...] |
SelectionDAGBuilder.cpp | [all...] |
LegalizeFloatTypes.cpp | [all...] |
/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyISelLowering.cpp | 145 setOperationAction(ISD::FMAXNAN, T, Legal);
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/external/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | 791 setOperationAction(ISD::FMAXNAN, VT, Expand); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | 308 setOperationAction(ISD::FMAXNAN, MVT::f16, Promote); 400 setOperationAction(ISD::FMAXNAN, Ty, Legal); 702 for (unsigned Opcode : {ISD::FMINNAN, ISD::FMAXNAN, [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | [all...] |