| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 511 /// FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
515 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorTypes.cpp | 58 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break;
208 return DAG.getNode(ISD::FPOWI, SDLoc(N),
603 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
[all...] |
| SelectionDAGDumper.cpp | 211 case ISD::FPOWI: return "fpowi";
|
| LegalizeVectorOps.cpp | 310 case ISD::FPOWI:
[all...] |
| LegalizeFloatTypes.cpp | 98 case ISD::FPOWI: R = SoftenFloatRes_FPOWI(N); break;
[all...] |
| LegalizeDAG.cpp | [all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyISelLowering.cpp | 135 for (auto Op : {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOWI, ISD::FPOW,
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 293 setOperationAction(ISD::FPOWI, MVT::f16, Promote);
337 setOperationAction(ISD::FPOWI, MVT::v4f16, Expand);
369 setOperationAction(ISD::FPOWI, MVT::v8f16, Expand);
650 setOperationAction(ISD::FPOWI, VT.getSimpleVT(), Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 504 setOperationAction(ISD::FPOWI, MVT::v2f64, Expand);
522 setOperationAction(ISD::FPOWI, MVT::v4f32, Expand);
539 setOperationAction(ISD::FPOWI, MVT::v2f32, Expand);
663 setOperationAction(ISD::FPOWI, MVT::f64, Expand);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 365 setOperationAction(ISD::FPOWI, MVT::f32, Expand);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 464 setOperationAction(ISD::FPOWI, VT, Expand);
697 setOperationAction(ISD::FPOWI , MVT::v4f64, Expand);
743 setOperationAction(ISD::FPOWI , MVT::v4f32, Expand);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 710 setOperationAction(ISD::FPOWI, VT, Expand);
[all...] |
