| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-m68hc11/ |
| xgate-link.s | 7 ldw r1,#var1 ; expands to two IMM8 %hi,%lo relocate
8 add r5,#var2 ; expands to two IMM8 %hi,%lo relocate
11 ldl r3,#0x21 ; regular IMM8
12 ldh r6,#var5 ; IMM8 with relocate
13 cmp r1,#0xabcd ; expands to two IMM8 with constant
14 cmp r2,#var3 ; expands to two IMM8 %hi,%lo relocate
|
| xgate1.s | 7 ldw r1,#var1 ; expands to two IMM8 %hi,%lo relocate
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| ia64-opc-a.c | 104 {"sub", A, OpX2aVeX4X2b (8, 0, 0, 9, 1), {R1, IMM8, R3}, EMPTY},
105 {"and", A, OpX2aVeX4X2b (8, 0, 0, 0xb, 0), {R1, IMM8, R3}, EMPTY},
106 {"andcm", A, OpX2aVeX4X2b (8, 0, 0, 0xb, 1), {R1, IMM8, R3}, EMPTY},
107 {"or", A, OpX2aVeX4X2b (8, 0, 0, 0xb, 2), {R1, IMM8, R3}, EMPTY},
108 {"xor", A, OpX2aVeX4X2b (8, 0, 0, 0xb, 3), {R1, IMM8, R3}, EMPTY},
206 {"cmp.lt", A2, OpX2TaC (0xc, 2, 0, 0), {P1, P2, IMM8, R3}, EMPTY},
209 {"cmp.ge", A2, OpX2TaC (0xc, 2, 0, 0), {P2, P1, IMM8, R3}, EMPTY},
210 {"cmp.lt.unc", A2, OpX2TaC (0xc, 2, 0, 1), {P1, P2, IMM8, R3}, EMPTY},
213 {"cmp.ge.unc", A2, OpX2TaC (0xc, 2, 0, 1), {P2, P1, IMM8, R3}, EMPTY},
214 {"cmp.eq.and", A2, OpX2TaC (0xc, 2, 1, 0), {P1, P2, IMM8, R3}, EMPTY}
[all...] |
| h8500-opc.h | 141 #define IMM8 35
171 {2,'s','E','C','C',O_XORC|O_BYTE,"xorc.b",2,{IMM8,CRB},3, {{0x04,0xff,0 },{0x00,0x00,IMM8 },{0x68,0xf8,CRB }}},
185 {4,'m','E','D','D',O_XOR|O_BYTE,"xor.b",2,{IMM8,RD},3, {{0x04,0xff,0 },{0x00,0x00,IMM8 },{0x60,0xf8,RD }}},
215 {10,'a','E','!','!',O_TST|O_BYTE,"tst.b",1,{IMM8,0},3, {{0x04,0xff,0 },{0x00,0x00,IMM8 },{0x16,0xff,0 }}},
236 {14,'s','E','!','E',O_TAS|O_BYTE,"tas.b",1,{IMM8,0},3, {{0x04,0xff,0 },{0x00,0x00,IMM8 },{0x17,0xff,0 }}},
244 {15,'s','E','!','E',O_TAS|O_UNSZ,"tas",1,{IMM8,0},3, {{0x04,0xff,0 },{0x00,0x00,IMM8 },{0x17,0xff,0 }}}
[all...] |
| m10300-opc.c | 82 #define IMM8 (AM2+1)
87 #define IMM16 (IMM8+1)
454 { "mov", 0x9000, 0xf000, 0, FMT_S1, 0, {IMM8, AN01}},
474 { "mov", 0x5c00, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), AN0}},
477 { "mov", 0x5800, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), DN0}},
484 { "mov", 0x4300, 0xf300, 0, FMT_S1, 0, {AM1, MEM2(IMM8, SP)}},
487 { "mov", 0x4200, 0xf300, 0, FMT_S1, 0, {DM1, MEM2(IMM8, SP)}},
526 { "mov", 0xfb8a0000, 0xffff0f00, 0, FMT_D7, AM33, {MEM2(IMM8, SP), RN2}},
528 { "mov", 0xfb9a0000, 0xffff0f00, 0, FMT_D7, AM33, {RM2, MEM2(IMM8, SP)}},
569 { "mov", 0xfbf80000, 0xffff0000, 0, FMT_D7, AM33, {IMM8, XRN02}}
[all...] |
| xstormy16-opc.c | 289 /* mov.w Rx,#$imm8 */
292 { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
439 /* and Rx,#$imm8 */
442 { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
457 /* or Rx,#$imm8 */
460 { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
475 /* xor Rx,#$imm8 */
478 { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
505 /* add Rx,#$imm8 */
508 { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } }
[all...] |
| ia64-opc.h | 105 #define IMM8 IA64_OPND_IMM8
|
| h8500-dis.c | 175 case IMM8:
297 case IMM8:
|
| m10200-opc.c | 64 #define IMM8 (AM1+1)
69 #define IMM16 (IMM8+1)
282 { "and", 0xf50000, 0xfffc00, FMT_5, {IMM8, DN0}},
286 { "or", 0xf50800, 0xfffc00, FMT_5, {IMM8, DN0}},
298 { "btst", 0xf50400, 0xfffc00, FMT_5, {IMM8, DN0}},
|
| ia64-opc-i.c | 142 {"mov.i", I, OpX3X6 (0, 0, 0x0a), {AR3, IMM8}, EMPTY},
170 {"dep.z", I, OpX2XYb (5, 1, 1, 1), {R1, IMM8, CPOS6a, LEN6}, EMPTY},
|
| epiphany-opc.c | [all...] |
| ia64-opc-m.c | 120 {"mov.m", M, OpX3X4X2 (0, 0, 8, 2), {AR3, IMM8}, EMPTY},
[all...] |
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| h8300.h | 127 IMM8 = IMM | SRC | L_8,
276 #define IMM8LIST IMM8, DATA
[all...] |
| /external/pcre/dist/sljit/ |
| sljitNativeARM_T2_32.c | 58 #define IMM8(imm) (imm)
553 return push_inst16(compiler, ADDSI8 | IMM8(imm) | RDN3(dst));
555 return push_inst16(compiler, SUBSI8 | IMM8(nimm) | RDN3(dst));
590 return push_inst16(compiler, SUBSI8 | IMM8(imm) | RDN3(dst));
592 return push_inst16(compiler, ADDSI8 | IMM8(nimm) | RDN3(dst));
595 return push_inst16(compiler, CMPI | IMM8(imm) | RDN3(reg));
[all...] |
