| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCNaCl.h | 21 bool *IsStore = nullptr);
|
| MipsNaClELFStreamer.cpp | 150 bool IsStore;
152 &IsStore);
158 bool MaskAfter = IsSPFirstOperand && !IsStore;
203 bool *IsStore) {
204 if (IsStore)
205 *IsStore = false;
235 if (IsStore)
236 *IsStore = true;
243 if (IsStore)
244 *IsStore = true
[all...] |
| /external/v8/test/unittests/interpreter/ |
| interpreter-assembler-unittest.h | 37 Matcher<compiler::Node*> IsStore(
|
| interpreter-assembler-unittest.cc | 83 Matcher<Node*> InterpreterAssemblerTest::InterpreterAssemblerForTest::IsStore(
87 return ::i::compiler::IsStore(rep_matcher, base_matcher, index_matcher,
515 m.IsStore(StoreRepresentation(MachineRepresentation::kTagged,
622 m.IsStore(StoreRepresentation(MachineRepresentation::kTagged,
|
| /external/llvm/lib/CodeGen/ |
| AtomicExpandPass.cpp | 51 bool IsStore, bool IsLoad);
103 bool IsStore, IsLoad;
108 IsStore = false;
113 IsStore = true;
119 IsStore = IsLoad = true;
130 IsStore = IsLoad = true;
134 MadeChange |= bracketInstWithFences(I, FenceOrdering, IsStore, IsLoad);
179 bool IsStore, bool IsLoad) {
182 auto LeadingFence = TLI->emitLeadingFence(Builder, Order, IsStore, IsLoad);
184 auto TrailingFence = TLI->emitTrailingFence(Builder, Order, IsStore, IsLoad)
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCVSXSwapRemoval.cpp | 79 unsigned int IsStore : 1;
365 SwapVector[VecIdx].IsStore = 1;
371 SwapVector[VecIdx].IsStore = 1;
675 SwapVector[UseIdx].IsStore) {
691 } else if (SwapVector[EntryIdx].IsStore && SwapVector[EntryIdx].IsSwap) {
698 SwapVector[DefIdx].IsStore) {
744 } else if (SwapVector[EntryIdx].IsStore && SwapVector[EntryIdx].IsSwap) {
[all...] |
| PPCISelLowering.h | 512 bool IsStore, bool IsLoad) const override;
514 bool IsStore, bool IsLoad) const override;
[all...] |
| PPCISelLowering.cpp | [all...] |
| /external/v8/test/unittests/compiler/ |
| int64-lowering-unittest.cc | 201 IsStore(
204 IsStore(rep, IsInt32Constant(base),
214 IsStore(
218 IsStore(rep, IsInt32Constant(base), IsInt32Constant(index),
557 IsStore(StoreRepresentation(MachineRepresentation::kWord32,
562 IsStore(StoreRepresentation(MachineRepresentation::kWord32,
588 Matcher<Node*> store_matcher = IsStore(
[all...] |
| machine-operator-reducer-unittest.cc | [all...] |
| node-test-utils.h | 294 Matcher<Node*> IsStore(const Matcher<StoreRepresentation>& rep_matcher,
|
| node-test-utils.cc | [all...] |
| /external/v8/src/arm64/ |
| instructions-arm64.cc | 43 bool Instruction::IsStore() const {
|
| instructions-arm64.h | 232 bool IsStore() const;
|
| simulator-arm64.cc | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 443 bool IsStore, bool IsLoad) const override;
445 bool IsStore, bool IsLoad) const override;
|
| ARMLoadStoreOptimizer.cpp | 456 bool IsStore =
459 if (IsLoad || IsStore) {
472 if (Offset >= 0 && !(IsStore && InstrSrcReg == Base))
[all...] |
| ARMISelLowering.cpp | [all...] |
| /external/clang/lib/CodeGen/ |
| CGAtomic.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonExpandCondsets.cpp | 853 bool IsLoad = TheI->mayLoad(), IsStore = TheI->mayStore();
854 if (!IsLoad && !IsStore)
876 bool Conflict = (L && IsStore) || S;
[all...] |
| /external/vixl/src/vixl/a64/ |
| instructions-a64.cc | 104 bool Instruction::IsStore() const {
|
| instructions-a64.h | 270 bool IsStore() const;
|
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86MCInstLower.cpp | 355 bool IsStore = Inst.getOperand(0).isReg() && Inst.getOperand(1).isReg();
356 unsigned AddrBase = IsStore;
357 unsigned RegOp = IsStore ? 0 : 5;
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
