| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600ExpandSpecialInstrs.cpp | 64 bool IsVector = TII->isVector(MI);
66 if (!IsReduction && !IsVector && !IsCube) {
|
| /external/vixl/src/vixl/a64/ |
| assembler-a64.cc | [all...] |
| assembler-a64.h | 316 VIXL_ASSERT(!(Is8Bits() && IsVector()));
320 VIXL_ASSERT(!(Is16Bits() && IsVector()));
324 VIXL_ASSERT(!(Is32Bits() && IsVector()));
341 bool IsVector() const {
[all...] |
| /external/eigen/test/ |
| mapstaticmethods.cpp | 17 bool IsVector = PlainObjectType::IsVectorAtCompileTime
21 template<typename PlainObjectType, bool IsVector>
22 struct mapstaticmethods_impl<PlainObjectType, false, IsVector>
26 mapstaticmethods_impl<PlainObjectType, true, IsVector>::run(m);
|
| /external/llvm/lib/Target/SystemZ/AsmParser/ |
| SystemZAsmParser.cpp | 375 unsigned &Index, bool &IsVector, const MCExpr *&Length,
576 unsigned &Index, bool &IsVector,
586 IsVector = false;
598 IsVector = true;
641 bool IsVector;
644 if (parseAddress(Base, Disp, Index, IsVector, Length, Regs, RegKind))
647 if (IsVector && MemKind != BDVMem) {
652 if (!IsVector && MemKind == BDVMem) {
767 bool IsVector;
769 if (parseAddress(Base, Expr, Index, IsVector, Length, SystemZMC::GR64Regs
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| R600ExpandSpecialInstrs.cpp | 240 bool IsVector = TII->isVector(MI);
242 if (!IsReduction && !IsVector && !IsCube) {
|
| /external/eigen/Eigen/src/Core/ |
| Array.h | 54 template <typename Derived, typename OtherDerived, bool IsVector>
|
| Matrix.h | 344 template <typename Derived, typename OtherDerived, bool IsVector>
|
| PlainObjectBase.h | 52 bool IsVector = bool(Derived::IsVectorAtCompileTime) && bool(OtherDerived::IsVectorAtCompileTime)>
678 template <typename Derived, typename OtherDerived, bool IsVector>
[all...] |
| /external/eigen/Eigen/src/Geometry/ |
| RotationBase.h | 17 template<typename RotationDerived, typename MatrixType, bool IsVector=MatrixType::IsVectorAtCompileTime>
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMELFStreamer.cpp | 74 bool isVector) override;
138 bool isVector) {
140 if (isVector)
370 bool isVector) override;
435 void emitRegSave(const SmallVectorImpl<unsigned> &RegList, bool isVector);
644 bool isVector) {
645 getStreamer().emitRegSave(RegList, isVector);
[all...] |
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| AArch64AsmParser.cpp | 60 unsigned matchRegisterNameAlias(StringRef Name, bool isVector);
177 bool isVector;
920 bool isReg() const override { return Kind == k_Register && !Reg.isVector; }
921 bool isVectorReg() const { return Kind == k_Register && Reg.isVector; }
923 return Kind == k_Register && Reg.isVector &&
928 return Kind == k_Register && !Reg.isVector &&
932 return Kind == k_Register && !Reg.isVector &&
937 return Kind == k_Register && !Reg.isVector &&
943 return Kind == k_Register && !Reg.isVector &&
[all...] |
| /external/clang/lib/CodeGen/ |
| TargetInfo.cpp | [all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | 225 bool parseDirectiveRegSave(SMLoc L, bool IsVector);
[all...] |
