| /external/llvm/lib/Target/Hexagon/ |
| HexagonExpandPredSpillCode.cpp | 110 MachineInstr *NewMI = BuildMI(*MBB, MII, MI->getDebugLoc(),
112 NewMI->addOperand(Op0);
113 NewMI->addOperand(Op1);
114 NewMI->addOperand(Op4);
115 NewMI->addOperand(MachineOperand::CreateReg(Hexagon::M0,
119 NewMI->addOperand(Op2);
153 MachineInstr *NewMI = BuildMI(*MBB, MII, MI->getDebugLoc(),
155 NewMI->addOperand(Op1);
156 NewMI->addOperand(Op0);
157 NewMI->addOperand(Op2)
[all...] |
| HexagonNewValueJump.cpp | 631 MachineInstr *NewMI;
642 NewMI = BuildMI(*MBB, jmpPos, dl,
653 NewMI = BuildMI(*MBB, jmpPos, dl,
659 NewMI = BuildMI(*MBB, jmpPos, dl,
665 assert(NewMI && "New Value Jump Instruction Not created!");
666 (void)NewMI;
|
| HexagonVLIWPacketizer.cpp | 764 MachineInstr *NewMI = MF.CreateMachineInstr(D, DebugLoc());
765 bool ResourcesAvailable = ResourceTracker->canReserveResources(NewMI);
766 MF.DeleteMachineInstr(NewMI);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FixupLEAs.cpp | 108 MachineInstr *NewMI;
114 NewMI = BuildMI(*MF, MI->getDebugLoc(),
123 MFI->insert(MBBI, NewMI); // Insert the new inst
124 return NewMI;
279 MachineInstr *NewMI =
284 I = static_cast<MachineBasicBlock::iterator>(NewMI);
315 MachineInstr *NewMI = postRAConvertToLEA(MFI, MBI);
316 if (NewMI) {
320 DEBUG(dbgs() << "FixLEA: Replaced by: "; NewMI->dump(););
323 static_cast<MachineBasicBlock::iterator>(NewMI);
[all...] |
| X86ExpandPseudo.cpp | 124 MachineInstr *NewMI = std::prev(MBBI);
125 NewMI->copyImplicitOps(*MBBI->getParent()->getParent(), MBBI);
|
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| R600ExpandSpecialInstrs.cpp | 37 void SetFlagInNewMI(MachineInstr *NewMI, const MachineInstr *OldMI,
59 void R600ExpandSpecialInstrsPass::SetFlagInNewMI(MachineInstr *NewMI,
64 TII->setImmOperand(NewMI, Op, Val);
327 MachineInstr *NewMI =
331 NewMI->bundleWithPred();
333 TII->addFlag(NewMI, 0, MO_FLAG_MASK);
336 TII->addFlag(NewMI, 0, MO_FLAG_NOT_LAST);
338 SetFlagInNewMI(NewMI, &MI, AMDGPU::OpName::clamp);
339 SetFlagInNewMI(NewMI, &MI, AMDGPU::OpName::literal);
340 SetFlagInNewMI(NewMI, &MI, AMDGPU::OpName::src0_abs)
[all...] |
| R600ISelLowering.cpp | 212 MachineInstrBuilder NewMI;
219 NewMI = BuildMI(*BB, I, BB->findDebugLoc(I),
222 NewMI.addOperand(MI->getOperand(i));
229 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I,
233 TII->addFlag(NewMI, 0, MO_FLAG_CLAMP);
238 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I,
242 TII->addFlag(NewMI, 0, MO_FLAG_ABS);
247 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I,
251 TII->addFlag(NewMI, 0, MO_FLAG_NEG);
273 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, MI, AMDGPU::MOV
[all...] |
| AMDILCFGStructurizer.cpp | 509 MachineInstr *NewMI = MF->CreateMachineInstr(TII->get(NewOpcode), DL);
510 MBB->insert(I, NewMI);
511 MachineInstrBuilder MIB(*MF, NewMI);
513 SHOWNEWINSTR(NewMI);
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600ExpandSpecialInstrs.cpp | 150 MachineInstr *NewMI =
156 NewMI->setIsInsideBundle(Chan != 0);
157 TII->addFlag(NewMI, 0, Flags);
|
| R600ISelLowering.cpp | 64 MachineInstr *NewMI =
70 TII->addFlag(NewMI, 0, MO_FLAG_CLAMP);
75 MachineInstr *NewMI =
81 TII->addFlag(NewMI, 1, MO_FLAG_ABS);
87 MachineInstr *NewMI =
93 TII->addFlag(NewMI, 1, MO_FLAG_NEG);
206 MachineInstr *NewMI =
212 TII->addFlag(NewMI, 1, MO_FLAG_PUSH);
220 MachineInstr *NewMI =
226 TII->addFlag(NewMI, 1, MO_FLAG_PUSH)
[all...] |
| /external/llvm/lib/CodeGen/ |
| TargetInstrInfo.cpp | 122 bool NewMI,
165 if (NewMI) {
189 bool NewMI,
201 return commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2);
461 MachineInstr *NewMI =
463 MachineInstrBuilder MIB(MF, NewMI);
489 return NewMI;
512 MachineInstr *NewMI = nullptr;
517 NewMI = foldPatchpoint(MF, MI, Ops, FI, *this);
518 if (NewMI)
[all...] |
| RegisterCoalescer.cpp | 710 MachineInstr *NewMI =
712 if (!NewMI)
718 if (NewMI != DefMI) {
719 LIS->ReplaceMachineInstrInMaps(DefMI, NewMI);
721 MBB->insert(Pos, NewMI);
[all...] |
| TwoAddressInstructionPass.cpp | 650 MachineInstr *NewMI = TII->commuteInstruction(MI, false, RegBIdx, RegCIdx);
652 if (NewMI == nullptr) {
657 DEBUG(dbgs() << "2addr: COMMUTED TO: " << *NewMI);
658 assert(NewMI == MI &&
698 MachineInstr *NewMI = TII->convertToThreeAddress(MFI, mi, LV);
701 if (!NewMI)
705 DEBUG(dbgs() << "2addr: TO 3-ADDR: " << *NewMI);
709 LIS->ReplaceMachineInstrInMaps(mi, NewMI);
711 if (NewMI->findRegisterUseOperand(RegB, false, TRI))
715 Sunk = sink3AddrInstruction(NewMI, RegB, mi)
[all...] |
| MachineCSE.cpp | 481 MachineInstr *NewMI = TII->commuteInstruction(MI);
482 if (NewMI) {
484 FoundCSE = VNT.count(NewMI);
485 if (NewMI != MI) {
487 NewMI->eraseFromParent();
|
| TailDuplication.cpp | 431 MachineInstr *NewMI = TII->duplicate(MI, MF);
432 for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
433 MachineOperand &MO = NewMI->getOperand(i);
457 PredBB->insert(PredBB->instr_end(), NewMI);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| A15SDOptimizer.cpp | 386 MachineInstr *NewMI = MRI->getVRegDef(Reg);
387 if (!NewMI)
389 Front.push_back(NewMI);
394 MachineInstr *NewMI = MRI->getVRegDef(MI->getOperand(1).getReg());
395 if (!NewMI)
397 Front.push_back(NewMI);
|
| ARMBaseInstrInfo.cpp | 251 MachineInstr *NewMI = (Reg == WBReg) ? UpdateMI : MemMI;
253 LV->addVirtualRegisterDead(Reg, NewMI);
258 MachineInstr *NewMI = NewMIs[j];
259 if (!NewMI->readsRegister(Reg))
261 LV->addVirtualRegisterKilled(Reg, NewMI);
263 VI.Kills.push_back(NewMI);
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| LiveIntervalAnalysis.h | 257 void ReplaceMachineInstrInMaps(MachineInstr *MI, MachineInstr *NewMI) {
258 Indexes->replaceMachineInstrInMaps(MI, NewMI);
|
| LiveVariables.h | 196 MachineInstr *NewMI);
|
| /external/clang/lib/Lex/ |
| PPMacroExpansion.cpp | 183 auto *NewMI = Active->getMacroInfo();
194 if (MI && NewMI != MI &&
195 !MI->isIdenticalTo(*NewMI, *this, /*Syntactically=*/true))
198 SourceMgr.isInSystemHeader(NewMI->getDefinitionLoc());
199 MI = NewMI;
553 if (MacroInfo *NewMI = getMacroInfo(NewII))
554 if (!NewMI->isEnabled() || NewMI == MI) {
558 if (NewMI != MI || MI->isFunctionLike())
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.h | 95 bool NewMI,
|
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 281 MCInst NewMI;
283 NewMI.setOpcode(Opcode);
286 NewMI.addOperand(MI->getOperand(0));
289 NewMI.addOperand(NewReg);
291 // Copy the rest operands into NewMI.
293 NewMI.addOperand(MI->getOperand(i));
294 printInstruction(&NewMI, STI, O);
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 111 /// If NewMI is false, MI is modified in place and returned; otherwise, a
118 bool NewMI,
310 /// If NewMI is false, MI is modified in place and returned; otherwise, a
319 bool NewMI = false,
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrInfo.cpp | 658 // instruction OldMI with three-address instruction NewMI.
660 MachineInstr *NewMI,
667 LV->replaceKillInstruction(Op.getReg(), OldMI, NewMI);
670 return NewMI;
[all...] |
