/external/llvm/include/llvm/CodeGen/ |
RuntimeLibcalls.h | 399 Libcall getFPEXT(EVT OpVT, EVT RetVT); 403 Libcall getFPROUND(EVT OpVT, EVT RetVT); 407 Libcall getFPTOSINT(EVT OpVT, EVT RetVT); 411 Libcall getFPTOUINT(EVT OpVT, EVT RetVT); 415 Libcall getSINTTOFP(EVT OpVT, EVT RetVT); 419 Libcall getUINTTOFP(EVT OpVT, EVT RetVT);
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SelectionDAG.h | 627 /// BooleanContent for type OpVT or truncating it. 628 SDValue getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT, EVT OpVT); [all...] |
/external/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | 440 RTLIB::Libcall RTLIB::getFPEXT(EVT OpVT, EVT RetVT) { 441 if (OpVT == MVT::f16) { 444 } else if (OpVT == MVT::f32) { 449 } else if (OpVT == MVT::f64) { 459 RTLIB::Libcall RTLIB::getFPROUND(EVT OpVT, EVT RetVT) { 461 if (OpVT == MVT::f32) 463 if (OpVT == MVT::f64) 465 if (OpVT == MVT::f80) 467 if (OpVT == MVT::f128) 469 if (OpVT == MVT::ppcf128 [all...] |
/external/mesa3d/src/gallium/drivers/radeon/ |
AMDILISelDAGToDAG.cpp | 165 EVT OpVT = N->getValueType(0); 168 return CurDAG->SelectNodeTo(N, NewOpc, OpVT, TFI);
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/external/llvm/lib/CodeGen/SelectionDAG/ |
ScheduleDAGSDNodes.cpp | 462 EVT OpVT = N->getOperand(i).getValueType(); 463 assert(OpVT != MVT::Glue && "Glued nodes should be in same sunit!"); 464 bool isChain = OpVT == MVT::Other; [all...] |
LegalizeVectorTypes.cpp | 248 EVT OpVT = Op.getValueType(); 257 if (getTypeAction(OpVT) == TargetLowering::TypeScalarizeVector) { 260 EVT VT = OpVT.getVectorElementType(); 302 EVT OpVT = Cond->getOperand(0)->getValueType(0); 303 ScalarBool = TLI.getBooleanContents(OpVT.getScalarType()); 304 VecBool = TLI.getBooleanContents(OpVT); 385 EVT OpVT = LHS.getValueType(); 390 if (getTypeAction(OpVT) == TargetLowering::TypeScalarizeVector) { 394 EVT VT = OpVT.getVectorElementType(); 409 TargetLowering::getExtendForContent(TLI.getBooleanContents(OpVT)); [all...] |
LegalizeFloatTypes.cpp | [all...] |
LegalizeDAG.cpp | [all...] |
LegalizeTypes.cpp | 282 EVT OpVT = N->getOperand(i).getValueType(); 283 switch (getTypeAction(OpVT)) { [all...] |
DAGCombiner.cpp | [all...] |
TargetLowering.cpp | [all...] |
SelectionDAGBuilder.cpp | [all...] |
LegalizeIntegerTypes.cpp | [all...] |
SelectionDAG.cpp | [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelDAGToDAG.cpp | 771 EVT OpVT = Op0.getValueType(); 772 unsigned OpBW = OpVT.getSizeInBits(); 775 if (OpVT.isVector() && OpVT.getVectorElementType() == MVT::i1 && OpBW <= 64) { 777 unsigned NE = OpVT.getVectorNumElements(); [all...] |
HexagonISelLowering.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/AMDGPU/ |
R600ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | [all...] |
/external/llvm/utils/TableGen/ |
CodeGenDAGPatterns.cpp | [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | [all...] |