/external/llvm/include/llvm/MC/ |
MCRegisterInfo.h | 599 uint16_t Reg0; 602 MCRegUnitRootIterator() : Reg0(0), Reg1(0) {} 605 Reg0 = MCRI->RegUnitRoots[RegUnit][0]; 611 return Reg0; 616 return Reg0; 622 Reg0 = Reg1;
|
/external/llvm/lib/Target/Hexagon/ |
HexagonPeephole.cpp | 248 unsigned Reg0 = Op0.getReg(); 249 const TargetRegisterClass *RC0 = MRI->getRegClass(Reg0); 253 if (TargetRegisterInfo::isVirtualRegister(Reg0)) { 255 if (unsigned PeepholeSrc = PeepholeMap.lookup(Reg0)) {
|
/external/llvm/lib/Target/ARM/ |
ARMISelDAGToDAG.cpp | [all...] |
Thumb2SizeReduction.cpp | 658 unsigned Reg0 = MI->getOperand(0).getReg(); 664 if (!isARMLowRegister(Reg0) || !isARMLowRegister(Reg1) 667 if (Reg0 != Reg2) { 670 if (Reg1 != Reg0) 677 } else if (Reg0 != Reg1) { 682 MI->getOperand(CommOpIdx2).getReg() != Reg0) 689 if (Entry.LowRegs2 && !isARMLowRegister(Reg0)) [all...] |
ARMAsmPrinter.cpp | 301 unsigned Reg0 = TRI->getSubReg(RegBegin, ARM::gsub_0); 302 O << ARMInstPrinter::getRegisterName(Reg0) << ", "; [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelDAGToDAG.cpp | 226 unsigned Reg0 = cast<RegisterSDNode>(V0)->getReg(); 249 SDValue T0 = CurDAG->getCopyToReg(Sub0, dl, Reg0, Sub0, 264 SDValue T0 = CurDAG->getCopyFromReg(Chain, dl, Reg0, MVT::i32,
|
/external/llvm/lib/CodeGen/ |
TargetInstrInfo.cpp | 139 unsigned Reg0 = HasDef ? MI->getOperand(0).getReg() : 0; 153 if (HasDef && Reg0 == Reg1 && 156 Reg0 = Reg2; 158 } else if (HasDef && Reg0 == Reg2 && 161 Reg0 = Reg1; 172 MI->getOperand(0).setReg(Reg0); [all...] |
RegisterCoalescer.cpp | [all...] |
/external/llvm/lib/Target/Mips/ |
MipsSEFrameLowering.cpp | 440 unsigned Reg0 = 446 std::swap(Reg0, Reg1); 449 MCCFIInstruction::createOffset(nullptr, Reg0, Offset)); 458 unsigned Reg0 = MRI->getDwarfRegNum(Reg, true); 462 std::swap(Reg0, Reg1); 465 MCCFIInstruction::createOffset(nullptr, Reg0, Offset)); [all...] |
/external/llvm/lib/Target/ARM/InstPrinter/ |
ARMInstPrinter.cpp | [all...] |
/external/llvm/lib/Target/Mips/AsmParser/ |
MipsAsmParser.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCInstrInfo.cpp | 348 unsigned Reg0 = MI->getOperand(0).getReg(); 358 if (Reg0 == Reg1) { 378 unsigned Reg0 = ChangeReg0 ? Reg2 : MI->getOperand(0).getReg(); 381 .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead)) [all...] |
/external/llvm/lib/Target/X86/ |
X86InstrInfo.cpp | [all...] |