| /external/llvm/include/llvm/Target/ |
| TargetSelectionDAGInfo.h | 39 /// SDValue if the target declines to use custom code and a different
48 virtual SDValue
50 SDValue Chain,
51 SDValue Op1, SDValue Op2,
52 SDValue Op3, unsigned Align, bool isVolatile,
56 return SDValue();
63 /// SDValue if the target declines to use custom code and a different
65 virtual SDValue
67 SDValue Chain
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZSelectionDAGInfo.h | 27 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc DL, SDValue Chain,
28 SDValue Dst, SDValue Src,
29 SDValue Size, unsigned Align,
34 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc DL,
35 SDValue Chain, SDValue Dst, SDValue Byte,
36 SDValue Size, unsigned Align, bool IsVolatile
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelDAGToDAG.h | 57 virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base,
58 SDValue &Offset) const;
62 virtual bool selectAddrRegReg(SDValue Addr, SDValue &Base,
63 SDValue &Offset) const;
66 virtual bool selectAddrDefault(SDValue Addr, SDValue &Base,
67 SDValue &Offset) const;
70 virtual bool selectIntAddr(SDValue Addr, SDValue &Base
[all...] |
| MipsSEISelDAGToDAG.h | 33 unsigned getMSACtrlReg(const SDValue RegIdx) const;
40 SDNode *selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS,
43 bool selectAddrFrameIndex(SDValue Addr, SDValue &Base, SDValue &Offset) const;
44 bool selectAddrFrameIndexOffset(SDValue Addr, SDValue &Base, SDValue &Offset,
47 bool selectAddrRegImm(SDValue Addr, SDValue &Base
[all...] |
| MipsISelDAGToDAG.cpp | 69 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base,
70 SDValue &Offset) const {
75 bool MipsDAGToDAGISel::selectAddrRegReg(SDValue Addr, SDValue &Base,
76 SDValue &Offset) const {
81 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base,
82 SDValue &Offset) const {
87 bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base
[all...] |
| MipsSEISelLowering.h | 38 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
40 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
59 getOpndList(SmallVectorImpl<SDValue> &Ops,
60 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
62 bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee,
63 SDValue Chain) const override;
65 SDValue lowerLOAD(SDValue Op, SelectionDAG &DAG) const;
66 SDValue lowerSTORE(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeTypes.h | 100 SmallDenseMap<SDValue, SDValue, 8> PromotedIntegers;
104 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> ExpandedIntegers;
108 SmallDenseMap<SDValue, SDValue, 8> SoftenedFloats;
113 SmallDenseMap<SDValue, SDValue, 8> PromotedFloats;
117 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> ExpandedFloats
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86SelectionDAGInfo.h | 34 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
35 SDValue Chain,
36 SDValue Dst, SDValue Src,
37 SDValue Size, unsigned Align,
41 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
42 SDValue Chain,
43 SDValue Dst, SDValue Src,
44 SDValue Size, unsigned Align
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| R600ISelLowering.h | 29 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
30 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
32 SmallVectorImpl<SDValue> &Results,
34 SDValue LowerFormalArguments(
35 SDValue Chain,
40 SmallVectorImpl<SDValue> &InVals) const override;
50 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
55 SDValue OptimizeSwizzle(SDValue BuildVector, SDValue Swz[], SelectionDAG &DAG
[all...] |
| AMDGPUISelLowering.h | 32 SDValue LowerConstantInitializer(const Constant* Init, const GlobalValue *GV,
33 const SDValue &InitPtr,
34 SDValue Chain,
36 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
37 SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const;
38 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
39 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const
[all...] |
| SIISelLowering.h | 24 SDValue LowerParameter(SelectionDAG &DAG, EVT VT, EVT MemVT, SDLoc DL,
25 SDValue Chain, unsigned Offset, bool Signed) const;
26 SDValue LowerSampleIntrinsic(unsigned Opcode, const SDValue &Op,
28 SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
31 SDValue lowerImplicitZextParam(SelectionDAG &DAG, SDValue Op,
34 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64SelectionDAGInfo.h | 24 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl, SDValue Chain,
25 SDValue Dst, SDValue Src, SDValue Size,
|
| /external/llvm/lib/Target/ARM/ |
| ARMSelectionDAGInfo.h | 41 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
42 SDValue Chain,
43 SDValue Dst, SDValue Src,
44 SDValue Size, unsigned Align,
49 SDValue EmitTargetCodeForMemmove(SelectionDAG &DAG, SDLoc dl,
50 SDValue Chain,
51 SDValue Dst, SDValue Src,
52 SDValue Size, unsigned Align, bool isVolatile
[all...] |
| ARMISelLowering.h | 234 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
239 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
260 SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG) const;
261 SDValue PerformCMOVToBFICombine(SDNode *N, SelectionDAG &DAG) const;
262 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
280 bool isZExtFree(SDValue Val, EVT VT2) const override;
282 bool isVectorLoadExtDesirable(SDValue ExtVal) const override;
308 bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, SDValue &Offset
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonSelectionDAGInfo.h | 24 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
25 SDValue Chain,
26 SDValue Dst, SDValue Src,
27 SDValue Size, unsigned Align,
|
| HexagonISelLowering.h | 108 bool IsEligibleForTailCallOptimization(SDValue Callee,
111 const SmallVectorImpl<SDValue> &OutVals,
123 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
125 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
126 SDValue LowerEXTRACT_VECTOR(SDValue Op, SelectionDAG &DAG) const;
127 SDValue LowerINSERT_VECTOR(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreSelectionDAGInfo.h | 26 SDValue
28 SDValue Chain,
29 SDValue Op1, SDValue Op2,
30 SDValue Op3, unsigned Align, bool isVolatile,
|
| XCoreISelLowering.h | 100 bool isZExtFree(SDValue Val, EVT VT2) const override;
109 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
114 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
147 SDValue LowerCCCArguments(SDValue Chain,
152 SmallVectorImpl<SDValue> &InVals) const;
153 SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 80 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
86 SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const;
87 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
88 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
89 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.h | 27 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
28 SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
35 SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC,
38 bool isHWTrueValue(SDValue Op) const;
39 bool isHWFalseValue(SDValue Op) const;
44 virtual SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
48 SmallVectorImpl<SDValue> &InVals) const
[all...] |
| R600ISelLowering.h | 29 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
38 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
44 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
49 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
50 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 413 SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG);
457 bool getPreIndexedAddressParts(SDNode *N, SDValue &Base,
458 SDValue &Offset,
465 bool SelectAddressRegReg(SDValue N, SDValue &Base, SDValue &Index,
472 bool SelectAddressRegImm(SDValue N, SDValue &Disp, SDValue &Base,
477 bool SelectAddressRegRegOnly(SDValue N, SDValue &Base, SDValue &Index
[all...] |
| /external/llvm/lib/Target/BPF/ |
| BPFISelLowering.h | 40 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
50 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
51 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
52 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
55 SDValue LowerCallResult(SDValue Chain, SDValue InFlag
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAG.h | 191 SDValue Root;
336 const SDValue &getRoot() const { return Root; }
339 SDValue getEntryNode() const {
340 return SDValue(const_cast<SDNode *>(&EntryNode), 0);
345 const SDValue &setRoot(SDValue N) {
430 SDValue getConstant(uint64_t Val, SDLoc DL, EVT VT, bool isTarget = false,
432 SDValue getConstant(const APInt &Val, SDLoc DL, EVT VT, bool isTarget = false,
434 SDValue getConstant(const ConstantInt &Val, SDLoc DL, EVT VT,
436 SDValue getIntPtrConstant(uint64_t Val, SDLoc DL, bool isTarget = false)
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.h | 58 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
63 void computeKnownBitsForTargetNode(const SDValue Op,
79 void LowerAsmOperandForConstraint(SDValue Op,
81 std::vector<SDValue> &Ops,
110 SDValue
111 LowerFormalArguments(SDValue Chain,
116 SmallVectorImpl<SDValue> &InVals) const override;
117 SDValue LowerFormalArguments_32(SDValue Chain
[all...] |
