| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AddressingModes.h | 46 SXTH,
65 case AArch64_AM::SXTH: return "sxth";
132 case 5: return AArch64_AM::SXTH;
148 /// 101 ==> sxth
159 case AArch64_AM::SXTH: return 5; break;
195 /// 101 ==> sxth
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| addsub.s | 102 .irp extend, UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW, SXTX
|
| /art/compiler/optimizing/ |
| common_arm64.h | 284 case HArm64DataProcWithShifterOp::kSXTH: return vixl::SXTH;
|
| /external/llvm/test/MC/ARM/ |
| basic-thumb-instructions.s | 638 @ SXTB/SXTH
641 sxth r3, r5
644 @ CHECK: sxth r3, r5 @ encoding: [0x2b,0xb2]
|
| basic-thumb2-instructions.s | [all...] |
| v8_IT_manual.s | 514 @ SXTH, encoding T1
518 @ SXTH, encoding T2 (32-bit)
[all...] |
| /external/v8/test/cctest/ |
| test-assembler-arm64.cc | 313 __ Mvn(x13, Operand(x2, SXTH, 3));
386 __ Mov(x26, Operand(x13, SXTH, 3));
572 __ Orr(x11, x0, Operand(x1, SXTH, 1));
669 __ Orn(x11, x0, Operand(x1, SXTH, 1));
738 __ And(x11, x0, Operand(x1, SXTH, 1));
879 __ Bic(x11, x0, Operand(x1, SXTH, 1));
1007 __ Eor(x11, x0, Operand(x1, SXTH, 1));
1076 __ Eon(x11, x0, Operand(x1, SXTH, 1));
[all...] |
| test-disasm-arm64.cc | 156 COMPARE(Mov(w14, Operand(w15, SXTH, 2)), "sbfiz w14, w15, #2, #16");
396 COMPARE(adds(w21, w22, Operand(w23, SXTH, 2)), "adds w21, w22, w23, sxth #2");
400 COMPARE(cmn(x2, Operand(x3, SXTH, 4)), "cmn x2, w3, sxth #4");
422 COMPARE(subs(w21, w22, Operand(w23, SXTH, 2)), "subs w21, w22, w23, sxth #2");
532 COMPARE(sxth(w4, w5), "sxth w4, w5");
533 COMPARE(sxth(x6, x7), "sxth x6, w7")
[all...] |
| /external/pcre/dist/sljit/ |
| sljitNativeARM_T2_32.c | 161 #define SXTH 0xb200
713 return push_inst16(compiler, SXTH | RD3(dst) | RN3(arg2));
[all...] |
| sljitNativeARM_32.c | 122 #define SXTH 0xe6bf0070
[all...] |
| /external/v8/src/compiler/arm64/ |
| code-generator-arm64.cc | 121 return Operand(InputRegister32(index), SXTH);
149 return Operand(InputRegister64(index), SXTH);
[all...] |
| /external/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.h | 511 SXTH,
[all...] |
| /external/v8/src/arm64/ |
| constants-arm64.h | 344 SXTH = 5,
[all...] |
| assembler-arm64.cc | [all...] |
| simulator-arm64.cc | 990 case SXTH:
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| thumb2_bad_reg.s | 725 @ SXTH
726 sxth r13, r0
727 sxth r15, r0
728 sxth r0, r13
729 sxth r0, r15
|
| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | [all...] |
| /external/vixl/test/ |
| test-assembler-a64.cc | 303 __ Mvn(x13, Operand(x2, SXTH, 3));
476 __ Mov(x26, Operand(x13, SXTH, 3));
563 __ Orr(x11, x0, Operand(x1, SXTH, 1));
657 __ Orn(x11, x0, Operand(x1, SXTH, 1));
724 __ And(x11, x0, Operand(x1, SXTH, 1));
862 __ Bic(x11, x0, Operand(x1, SXTH, 1));
986 __ Eor(x11, x0, Operand(x1, SXTH, 1));
1053 __ Eon(x11, x0, Operand(x1, SXTH, 1));
[all...] |
| test-disasm-a64.cc | 161 COMPARE(Mov(w14, Operand(w15, SXTH, 2)), "sbfiz w14, w15, #2, #16");
395 COMPARE(adds(w21, w22, Operand(w23, SXTH, 2)), "adds w21, w22, w23, sxth #2");
399 COMPARE(cmn(x2, Operand(x3, SXTH, 4)), "cmn x2, w3, sxth #4");
421 COMPARE(subs(w21, w22, Operand(w23, SXTH, 2)), "subs w21, w22, w23, sxth #2");
542 COMPARE(sxth(w4, w5), "sxth w4, w5");
543 COMPARE(sxth(x6, x7), "sxth x6, w7")
[all...] |
| /external/vixl/src/vixl/a64/ |
| constants-a64.h | 281 SXTH = 5,
[all...] |
| simulator-a64.cc | 367 case SXTH:
[all...] |
| assembler-a64.cc | [all...] |
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| AArch64AsmParser.cpp | 1003 ET == AArch64_AM::UXTH || ET == AArch64_AM::SXTH ||
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64FastISel.cpp | [all...] |
| AArch64ISelDAGToDAG.cpp | 377 return AArch64_AM::SXTH;
[all...] |
