| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AddressingModes.h | 40 UXTB,
60 case AArch64_AM::UXTB: return "uxtb";
127 case 0: return AArch64_AM::UXTB;
143 /// shifter: 000 ==> uxtb
154 case AArch64_AM::UXTB: return 0; break;
190 /// shifter: 000 ==> uxtb
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| addsub.s | 102 .irp extend, UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW, SXTX
|
| /art/compiler/optimizing/ |
| common_arm64.h | 280 case HArm64DataProcWithShifterOp::kUXTB: return vixl::UXTB;
|
| /external/v8/test/cctest/ |
| test-disasm-arm64.cc | 154 COMPARE(Mov(w10, Operand(w11, UXTB)), "uxtb w10, w11");
155 COMPARE(Mov(x12, Operand(x13, UXTB, 1)), "ubfiz x12, x13, #1, #8");
389 COMPARE(add(w0, w1, Operand(w2, UXTB)), "add w0, w1, w2, uxtb");
390 COMPARE(adds(x3, x4, Operand(w5, UXTB, 1)), "adds x3, x4, w5, uxtb #1");
399 COMPARE(cmn(w0, Operand(w1, UXTB, 2)), "cmn w0, w1, uxtb #2");
402 COMPARE(add(w0, wcsp, Operand(w1, UXTB)), "add w0, wcsp, w1, uxtb")
[all...] |
| test-assembler-arm64.cc | 310 __ Mvn(w10, Operand(w2, UXTB));
383 __ Mov(w23, Operand(w13, UXTB));
567 __ Orr(w6, w0, Operand(w1, UXTB));
664 __ Orn(w6, w0, Operand(w1, UXTB));
733 __ And(w6, w0, Operand(w1, UXTB));
874 __ Bic(w6, w0, Operand(w1, UXTB));
1002 __ Eor(w6, w0, Operand(w1, UXTB));
1071 __ Eon(w6, w0, Operand(w1, UXTB));
[all...] |
| /external/llvm/test/MC/ARM/ |
| basic-thumb-instructions.s | 656 @ UXTB/UXTH
658 uxtb r7, r2
661 @ CHECK: uxtb r7, r2 @ encoding: [0xd7,0xb2]
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
| omxVCM4P10_PredictIntra_4x4_s.s | 389 UXTB tVal11, tVal7, ROR #24 ;// tVal11= 00 00 00 L0
|
| /external/vixl/test/ |
| test-disasm-a64.cc | 159 COMPARE(Mov(w10, Operand(w11, UXTB)), "uxtb w10, w11");
160 COMPARE(Mov(x12, Operand(x13, UXTB, 1)), "ubfiz x12, x13, #1, #8");
388 COMPARE(add(w0, w1, Operand(w2, UXTB)), "add w0, w1, w2, uxtb");
389 COMPARE(adds(x3, x4, Operand(w5, UXTB, 1)), "adds x3, x4, w5, uxtb #1");
398 COMPARE(cmn(w0, Operand(w1, UXTB, 2)), "cmn w0, w1, uxtb #2");
401 COMPARE(add(w0, wsp, Operand(w1, UXTB)), "add w0, wsp, w1, uxtb")
[all...] |
| test-assembler-a64.cc | 300 __ Mvn(w10, Operand(w2, UXTB));
473 __ Mov(w23, Operand(w13, UXTB));
558 __ Orr(w6, w0, Operand(w1, UXTB));
652 __ Orn(w6, w0, Operand(w1, UXTB));
719 __ And(w6, w0, Operand(w1, UXTB));
857 __ Bic(w6, w0, Operand(w1, UXTB));
981 __ Eor(w6, w0, Operand(w1, UXTB));
1048 __ Eon(w6, w0, Operand(w1, UXTB));
[all...] |
| /external/pcre/dist/sljit/ |
| sljitNativeARM_T2_32.c | 165 #define UXTB 0xb2c0
695 return push_inst16(compiler, UXTB | RD3(dst) | RN3(arg2));
[all...] |
| sljitNativeARM_32.c | 123 #define UXTB 0xe6ef0070
[all...] |
| /external/v8/src/compiler/arm64/ |
| code-generator-arm64.cc | 115 return Operand(InputRegister32(index), UXTB);
143 return Operand(InputRegister64(index), UXTB);
[all...] |
| /external/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.h | 505 UXTB,
[all...] |
| /external/v8/src/arm64/ |
| constants-arm64.h | 339 UXTB = 0,
[all...] |
| assembler-arm64.cc | [all...] |
| simulator-arm64.cc | 978 case UXTB:
[all...] |
| macro-assembler-arm64.cc | [all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| thumb2_bad_reg.s | 969 @ UXTB
970 uxtb r13, r0
971 uxtb r15, r0
972 uxtb r0, r13
973 uxtb r0, r15
|
| /external/vixl/src/vixl/a64/ |
| constants-a64.h | 276 UXTB = 0,
[all...] |
| simulator-a64.cc | 355 case UXTB:
[all...] |
| assembler-a64.cc | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelDAGToDAG.cpp | 387 return AArch64_AM::UXTB;
405 return !IsLoadStore ? AArch64_AM::UXTB : AArch64_AM::InvalidShiftExtend;
[all...] |
| AArch64FastISel.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| AArch64AsmParser.cpp | 1002 return (ET == AArch64_AM::UXTB || ET == AArch64_AM::SXTB ||
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | [all...] |
