| /art/runtime/arch/arm64/ |
| registers_arm64.h | 51 X24 = 24,
|
| quick_method_frame_info_arm64.h | 37 (1 << art::arm64::X23) | (1 << art::arm64::X24) | (1 << art::arm64::X25) |
|
| /art/compiler/jni/quick/arm64/ |
| calling_convention_arm64.cc | 188 return 1 << X19 | 1 << X20 | 1 << X21 | 1 << X22 | 1 << X23 | 1 << X24 |
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AsmBackend.cpp | 385 // X23/X24 pair = 0x00000004,
397 else if (Reg1 == AArch64::X23 && Reg2 == AArch64::X24 &&
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.h | 56 case AArch64::X24: return AArch64::W24;
96 case AArch64::W24: return AArch64::X24;
[all...] |
| /external/guava/guava-tests/benchmark/com/google/common/base/ |
| EnumsBenchmark.java | 80 X19, X20, X21, X22, X23, X24, X25, X26, X27, X28, X29, X30, X31, X32, X33, X34, X35, X36, X37,
89 X21, X22, X23, X24, X25, X26, X27, X28, X29, X30, X31, X32, X33, X34, X35, X36, X37, X38, X39,
|
| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| PPCDisassembler.cpp | 192 PPC::X24, PPC::X25, PPC::X26, PPC::X27,
|
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| PPCAsmParser.cpp | 64 PPC::X24, PPC::X25, PPC::X26, PPC::X27,
75 PPC::X24, PPC::X25, PPC::X26, PPC::X27,
[all...] |
| /art/compiler/utils/arm64/ |
| managed_register_arm64_test.cc | 618 EXPECT_TRUE(vixl::x24.Is(Arm64Assembler::reg_x(X24)));
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 209 {PPC::X24, -64},
[all...] |
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| AArch64Disassembler.cpp | 373 AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24,
[all...] |
| /external/valgrind/memcheck/ |
| mc_machine.c | [all...] |
