| /art/runtime/arch/arm64/ |
| registers_arm64.h | 54 X27 = 27,
|
| quick_method_frame_info_arm64.h | 38 (1 << art::arm64::X26) | (1 << art::arm64::X27) | (1 << art::arm64::X28) |
|
| /art/compiler/jni/quick/arm64/ |
| calling_convention_arm64.cc | 189 1 << X25 | 1 << X26 | 1 << X27 | 1 << X28 | 1 << X29 | 1 << LR;
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AsmBackend.cpp | 387 // X27/X28 pair = 0x00000010
403 else if (Reg1 == AArch64::X27 && Reg2 == AArch64::X28 &&
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.h | 59 case AArch64::X27: return AArch64::W27;
99 case AArch64::W27: return AArch64::X27;
[all...] |
| /external/guava/guava-tests/benchmark/com/google/common/base/ |
| EnumsBenchmark.java | 80 X19, X20, X21, X22, X23, X24, X25, X26, X27, X28, X29, X30, X31, X32, X33, X34, X35, X36, X37,
89 X21, X22, X23, X24, X25, X26, X27, X28, X29, X30, X31, X32, X33, X34, X35, X36, X37, X38, X39,
|
| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| PPCDisassembler.cpp | 192 PPC::X24, PPC::X25, PPC::X26, PPC::X27,
|
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| PPCAsmParser.cpp | 64 PPC::X24, PPC::X25, PPC::X26, PPC::X27,
75 PPC::X24, PPC::X25, PPC::X26, PPC::X27,
[all...] |
| /art/compiler/utils/arm64/ |
| managed_register_arm64_test.cc | 621 EXPECT_TRUE(vixl::x27.Is(Arm64Assembler::reg_x(X27)));
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 206 {PPC::X27, -40},
[all...] |
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| AArch64Disassembler.cpp | 374 AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP,
[all...] |
| /external/valgrind/memcheck/ |
| mc_machine.c | [all...] |
