| /external/boringssl/linux-aarch64/crypto/bn/ |
| armv8-mont.S | 84 adcs x13,x13,x7
147 adcs x13,x17,x19
154 adcs x13,x13,x7
299 adcs x21,x21,x15
301 adcs x22,x22,x16
303 adcs x23,x23,x17
305 adcs x24,x24,x14
307 adcs x25,x25,x15
309 adcs x26,x26,x16
315 adcs x22,x22,x1
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| tcompat2.d | 11 0+00 <[^>]*> 4148 * adcs r0, r1
12 0+02 <[^>]*> 4148 * adcs r0, r1
|
| armv1.s | 15 adcs r0, r0, r0
|
| armv1.d | 22 0+2c <[^>]*> e0b00000 ? adcs r0, r0, r0
|
| thumb-eabi.d | 31 0+02a <[^>]+> 417d adcs r5, r7
|
| thumb.d | 32 0+02a <[^>]+> 417d adcs r5, r7
|
| thumb32.d | 117 0[0-9a-f]+ <[^>]+> 4140 adcs r0, r0
118 0[0-9a-f]+ <[^>]+> 4145 adcs r5, r0
119 0[0-9a-f]+ <[^>]+> 4168 adcs r0, r5
120 0[0-9a-f]+ <[^>]+> 4168 adcs r0, r5
121 0[0-9a-f]+ <[^>]+> 4168 adcs r0, r5
127 0[0-9a-f]+ <[^>]+> eb50 0000 adcs\.w r0, r0, r0
[all...] |
| thumb32.s | 149 arit3 adc adcs adc.w adcs.w
|
| /external/boringssl/src/crypto/bn/asm/ |
| armv8-mont.pl | 142 adcs $hi1,$hi1,$hi0
205 adcs $hi1,$nhi,$ovf
212 adcs $hi1,$hi1,$hi0
369 adcs $acc2,$acc2,$t1
371 adcs $acc3,$acc3,$t2
373 adcs $acc4,$acc4,$t3
375 adcs $acc5,$acc5,$t0
377 adcs $acc6,$acc6,$t1
379 adcs $acc7,$acc7,$t2
385 adcs $acc3,$acc3,$t
[all...] |
| /external/valgrind/none/tests/arm/ |
| v6intThumb.stdout.exp | 285 ADCS-16 0x105
286 adcs r1, r2 :: rd 0x5859704f rm 0x27181728, c:v-in 0, cpsr 0x00000000
287 adcs r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 0, cpsr 0x40000000 Z
288 adcs r1, r2 :: rd 0x00000001 rm 0x00000000, c:v-in 0, cpsr 0x00000000
289 adcs r1, r2 :: rd 0x00000001 rm 0x00000001, c:v-in 0, cpsr 0x00000000
290 adcs r1, r2 :: rd 0x80000000 rm 0x00000000, c:v-in 0, cpsr 0x80000000 N
291 adcs r1, r2 :: rd 0x80000000 rm 0x80000000, c:v-in 0, cpsr 0x80000000 N
292 adcs r1, r2 :: rd 0x00000000 rm 0x80000000, c:v-in 0, cpsr 0x70000000 ZCV
293 adcs r1, r2 :: rd 0x5859704f rm 0x27181728, c:v-in 1, cpsr 0x00000000
294 adcs r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 1, cpsr 0x40000000 Z
[all...] |
| v6intARM.stdout.exp | 35 adcs r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x40000000 Z
36 adcs r0, r1, r2 :: rd 0x00000001 rm 0x00000000, rn 0x00000000, carryin 1, cpsr 0x00000000
[all...] |
| /external/llvm/test/MC/ARM/ |
| thumb_rewrites.s | 80 adcs r0, r0, r1
81 @ CHECK: adcs r0, r1 @ encoding: [0x48,0x41]
83 adcs r0, r1, r0
84 @ CHECK: adcs r0, r1 @ encoding: [0x48,0x41]
|
| basic-thumb-instructions.s | 26 adcs r4, r6
28 @ CHECK: adcs r4, r6 @ encoding: [0x74,0x41]
|
| basic-thumb2-instructions.s | 22 adcs r0, r1, #0
32 @ CHECK: adcs r0, r1, #0 @ encoding: [0x51,0xf1,0x00,0x00]
45 adcs r4, r5, r6
47 adcs.w r9, r1, r3
49 adcs r0, r1, r3, lsl #7
51 adcs.w r0, r1, r3, asr #32
54 @ CHECK: adcs.w r4, r5, r6 @ encoding: [0x55,0xeb,0x06,0x04]
56 @ CHECK: adcs.w r9, r1, r3 @ encoding: [0x51,0xeb,0x03,0x09]
58 @ CHECK: adcs.w r0, r1, r3, lsl #7 @ encoding: [0x51,0xeb,0xc3,0x10]
60 @ CHECK: adcs.w r0, r1, r3, asr #32 @ encoding: [0x51,0xeb,0x23,0x00
[all...] |
| basic-arm-instructions.s | 36 adcs r1, r2, #0xf00
37 adcs r7, r8, #40, #2
59 @ CHECK: adcs r1, r2, #3840 @ encoding: [0x0f,0x1c,0xb2,0xe2]
60 @ CHECK: adcs r7, r8, #40, #2 @ encoding: [0x28,0x71,0xb8,0xe2]
[all...] |
| /external/valgrind/none/tests/arm64/ |
| integer.stdout.exp | 40 adcs x3, x4, x5 :: rd 0000000000004abe rm 0000000000003039, rn 0000000000001a85, cin 0, nzcv 00000000
41 adcs x3, x4, x5 :: rd 0000000000004abf rm 0000000000003039, rn 0000000000001a85, cin 1, nzcv 00000000
42 adcs x3, x4, x5 :: rd ffffffffffffffff rm 0000000000000000, rn ffffffffffffffff, cin 0, nzcv 80000000 N
43 adcs x3, x4, x5 :: rd 0000000000000000 rm 0000000000000000, rn ffffffffffffffff, cin 1, nzcv 60000000 ZC
44 adcs x3, x4, x5 :: rd 5859704f00000000 rm 3141592700000000, rn 2718172800000000, cin 0, nzcv 00000000
45 adcs x3, x4, x5 :: rd 5859704f00000001 rm 3141592700000000, rn 2718172800000000, cin 1, nzcv 00000000
46 adcs x3, x4, x5 :: rd 0000000000000000 rm 0000000000000000, rn 0000000000000000, cin 0, nzcv 40000000 Z
47 adcs x3, x4, x5 :: rd 0000000000000001 rm 0000000000000000, rn 0000000000000000, cin 1, nzcv 00000000
48 adcs x3, x4, x5 :: rd 0000000100000000 rm 0000000100000000, rn 0000000000000000, cin 0, nzcv 00000000
49 adcs x3, x4, x5 :: rd 0000000100000001 rm 0000000100000000, rn 0000000000000000, cin 1, nzcv 00000000 (…)
[all...] |
| /external/llvm/test/MC/AArch64/ |
| basic-a64-diagnostics.s | 619 adcs wsp, w3, w5
620 adcs w1, wsp, w2
621 adcs w0, w10, wsp
623 // CHECK-ERROR-NEXT: adcs wsp, w3, w5
626 // CHECK-ERROR-NEXT: adcs w1, wsp, w2
629 // CHECK-ERROR-NEXT: adcs w0, w10, wsp
632 adcs sp, x3, x5
633 adcs x1, sp, x2
634 adcs x0, x10, sp
636 // CHECK-ERROR-NEXT: adcs sp, x3, x
[all...] |
| arm64-arithmetic-encoding.s | 10 adcs w5, w4, w3
11 adcs x5, x4, x3
15 ; CHECK: adcs w5, w4, w3 ; encoding: [0x85,0x00,0x03,0x3a]
16 ; CHECK: adcs x5, x4, x3 ; encoding: [0x85,0x00,0x03,0xba]
|
| basic-a64-instructions.s | [all...] |
| /art/compiler/utils/arm/ |
| assembler_arm32_test.cc | 783 TEST_F(AssemblerArm32Test, Adcs) {
784 T4Helper(&arm::Arm32Assembler::adcs, false, "adc{cond}s {reg1}, {reg2}, {shift}", "adcs");
|
| assembler_arm.h | 482 virtual void adcs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) { function in class:art::arm::ArmAssembler
[all...] |
| /art/compiler/utils/ |
| assembler_thumb_test.cc | 259 __ adcs(R0, R0, ShifterOperand(R1));
291 __ adcs(R0, R0, ShifterOperand(R8));
310 __ adcs(R0, R0, ShifterOperand(R1), arm::EQ);
[all...] |
| /external/v8/src/arm64/ |
| assembler-arm64.h | [all...] |
| assembler-arm64.cc | 1150 void Assembler::adcs(const Register& rd, function in class:v8::internal::Assembler
[all...] |
| /external/v8/test/cctest/ |
| test-disasm-arm64.cc | 443 COMPARE(adcs(w6, w7, Operand(w8)), "adcs w6, w7, w8");
444 COMPARE(adcs(x9, x10, Operand(x11)), "adcs x9, x10, x11");
[all...] |
