1 /*M/////////////////////////////////////////////////////////////////////////////////////// 2 // 3 // IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. 4 // 5 // By downloading, copying, installing or using the software you agree to this license. 6 // If you do not agree to this license, do not download, install, 7 // copy or use the software. 8 // 9 // 10 // License Agreement 11 // For Open Source Computer Vision Library 12 // 13 // Copyright (C) 2000-2008, Intel Corporation, all rights reserved. 14 // Copyright (C) 2009, Willow Garage Inc., all rights reserved. 15 // Third party copyrights are property of their respective owners. 16 // 17 // Redistribution and use in source and binary forms, with or without modification, 18 // are permitted provided that the following conditions are met: 19 // 20 // * Redistribution's of source code must retain the above copyright notice, 21 // this list of conditions and the following disclaimer. 22 // 23 // * Redistribution's in binary form must reproduce the above copyright notice, 24 // this list of conditions and the following disclaimer in the documentation 25 // and/or other materials provided with the distribution. 26 // 27 // * The name of the copyright holders may not be used to endorse or promote products 28 // derived from this software without specific prior written permission. 29 // 30 // This software is provided by the copyright holders and contributors "as is" and 31 // any express or implied warranties, including, but not limited to, the implied 32 // warranties of merchantability and fitness for a particular purpose are disclaimed. 33 // In no event shall the Intel Corporation or contributors be liable for any direct, 34 // indirect, incidental, special, exemplary, or consequential damages 35 // (including, but not limited to, procurement of substitute goods or services; 36 // loss of use, data, or profits; or business interruption) however caused 37 // and on any theory of liability, whether in contract, strict liability, 38 // or tort (including negligence or otherwise) arising in any way out of 39 // the use of this software, even if advised of the possibility of such damage. 40 // 41 //M*/ 42 43 #include "perf_precomp.hpp" 44 45 using namespace std; 46 using namespace testing; 47 using namespace perf; 48 49 ////////////////////////////////////////////////////////////////////// 50 // Norm 51 52 DEF_PARAM_TEST(Sz_Depth_Norm, cv::Size, MatDepth, NormType); 53 54 PERF_TEST_P(Sz_Depth_Norm, Norm, 55 Combine(CUDA_TYPICAL_MAT_SIZES, 56 Values(CV_8U, CV_16U, CV_32S, CV_32F), 57 Values(NormType(cv::NORM_INF), NormType(cv::NORM_L1), NormType(cv::NORM_L2)))) 58 { 59 const cv::Size size = GET_PARAM(0); 60 const int depth = GET_PARAM(1); 61 const int normType = GET_PARAM(2); 62 63 cv::Mat src(size, depth); 64 if (depth == CV_8U) 65 cv::randu(src, 0, 254); 66 else 67 declare.in(src, WARMUP_RNG); 68 69 if (PERF_RUN_CUDA()) 70 { 71 const cv::cuda::GpuMat d_src(src); 72 cv::cuda::GpuMat d_buf; 73 double gpu_dst; 74 75 TEST_CYCLE() gpu_dst = cv::cuda::norm(d_src, normType, d_buf); 76 77 SANITY_CHECK(gpu_dst, 1e-6, ERROR_RELATIVE); 78 } 79 else 80 { 81 double cpu_dst; 82 83 TEST_CYCLE() cpu_dst = cv::norm(src, normType); 84 85 SANITY_CHECK(cpu_dst, 1e-6, ERROR_RELATIVE); 86 } 87 } 88 89 ////////////////////////////////////////////////////////////////////// 90 // NormDiff 91 92 DEF_PARAM_TEST(Sz_Norm, cv::Size, NormType); 93 94 PERF_TEST_P(Sz_Norm, NormDiff, 95 Combine(CUDA_TYPICAL_MAT_SIZES, 96 Values(NormType(cv::NORM_INF), NormType(cv::NORM_L1), NormType(cv::NORM_L2)))) 97 { 98 const cv::Size size = GET_PARAM(0); 99 const int normType = GET_PARAM(1); 100 101 cv::Mat src1(size, CV_8UC1); 102 declare.in(src1, WARMUP_RNG); 103 104 cv::Mat src2(size, CV_8UC1); 105 declare.in(src2, WARMUP_RNG); 106 107 if (PERF_RUN_CUDA()) 108 { 109 const cv::cuda::GpuMat d_src1(src1); 110 const cv::cuda::GpuMat d_src2(src2); 111 double gpu_dst; 112 113 TEST_CYCLE() gpu_dst = cv::cuda::norm(d_src1, d_src2, normType); 114 115 SANITY_CHECK(gpu_dst); 116 117 } 118 else 119 { 120 double cpu_dst; 121 122 TEST_CYCLE() cpu_dst = cv::norm(src1, src2, normType); 123 124 SANITY_CHECK(cpu_dst); 125 } 126 } 127 128 ////////////////////////////////////////////////////////////////////// 129 // Sum 130 131 PERF_TEST_P(Sz_Depth_Cn, Sum, 132 Combine(CUDA_TYPICAL_MAT_SIZES, 133 Values(CV_8U, CV_16U, CV_32F), 134 CUDA_CHANNELS_1_3_4)) 135 { 136 const cv::Size size = GET_PARAM(0); 137 const int depth = GET_PARAM(1); 138 const int channels = GET_PARAM(2); 139 140 const int type = CV_MAKE_TYPE(depth, channels); 141 142 cv::Mat src(size, type); 143 declare.in(src, WARMUP_RNG); 144 145 if (PERF_RUN_CUDA()) 146 { 147 const cv::cuda::GpuMat d_src(src); 148 cv::Scalar gpu_dst; 149 150 TEST_CYCLE() gpu_dst = cv::cuda::sum(d_src); 151 152 SANITY_CHECK(gpu_dst, 1e-5, ERROR_RELATIVE); 153 } 154 else 155 { 156 cv::Scalar cpu_dst; 157 158 TEST_CYCLE() cpu_dst = cv::sum(src); 159 160 SANITY_CHECK(cpu_dst, 1e-6, ERROR_RELATIVE); 161 } 162 } 163 164 ////////////////////////////////////////////////////////////////////// 165 // SumAbs 166 167 PERF_TEST_P(Sz_Depth_Cn, SumAbs, 168 Combine(CUDA_TYPICAL_MAT_SIZES, 169 Values(CV_8U, CV_16U, CV_32F), 170 CUDA_CHANNELS_1_3_4)) 171 { 172 const cv::Size size = GET_PARAM(0); 173 const int depth = GET_PARAM(1); 174 const int channels = GET_PARAM(2); 175 176 const int type = CV_MAKE_TYPE(depth, channels); 177 178 cv::Mat src(size, type); 179 declare.in(src, WARMUP_RNG); 180 181 if (PERF_RUN_CUDA()) 182 { 183 const cv::cuda::GpuMat d_src(src); 184 cv::Scalar gpu_dst; 185 186 TEST_CYCLE() gpu_dst = cv::cuda::absSum(d_src); 187 188 SANITY_CHECK(gpu_dst, 1e-6, ERROR_RELATIVE); 189 } 190 else 191 { 192 FAIL_NO_CPU(); 193 } 194 } 195 196 ////////////////////////////////////////////////////////////////////// 197 // SumSqr 198 199 PERF_TEST_P(Sz_Depth_Cn, SumSqr, 200 Combine(CUDA_TYPICAL_MAT_SIZES, 201 Values<MatDepth>(CV_8U, CV_16U, CV_32F), 202 CUDA_CHANNELS_1_3_4)) 203 { 204 const cv::Size size = GET_PARAM(0); 205 const int depth = GET_PARAM(1); 206 const int channels = GET_PARAM(2); 207 208 const int type = CV_MAKE_TYPE(depth, channels); 209 210 cv::Mat src(size, type); 211 declare.in(src, WARMUP_RNG); 212 213 if (PERF_RUN_CUDA()) 214 { 215 const cv::cuda::GpuMat d_src(src); 216 cv::Scalar gpu_dst; 217 218 TEST_CYCLE() gpu_dst = cv::cuda::sqrSum(d_src); 219 220 SANITY_CHECK(gpu_dst, 1e-6, ERROR_RELATIVE); 221 } 222 else 223 { 224 FAIL_NO_CPU(); 225 } 226 } 227 228 ////////////////////////////////////////////////////////////////////// 229 // MinMax 230 231 PERF_TEST_P(Sz_Depth, MinMax, 232 Combine(CUDA_TYPICAL_MAT_SIZES, 233 Values(CV_8U, CV_16U, CV_32F, CV_64F))) 234 { 235 const cv::Size size = GET_PARAM(0); 236 const int depth = GET_PARAM(1); 237 238 cv::Mat src(size, depth); 239 if (depth == CV_8U) 240 cv::randu(src, 0, 254); 241 else 242 declare.in(src, WARMUP_RNG); 243 244 if (PERF_RUN_CUDA()) 245 { 246 const cv::cuda::GpuMat d_src(src); 247 double gpu_minVal, gpu_maxVal; 248 249 TEST_CYCLE() cv::cuda::minMax(d_src, &gpu_minVal, &gpu_maxVal, cv::cuda::GpuMat()); 250 251 SANITY_CHECK(gpu_minVal, 1e-10); 252 SANITY_CHECK(gpu_maxVal, 1e-10); 253 } 254 else 255 { 256 double cpu_minVal, cpu_maxVal; 257 258 TEST_CYCLE() cv::minMaxLoc(src, &cpu_minVal, &cpu_maxVal); 259 260 SANITY_CHECK(cpu_minVal); 261 SANITY_CHECK(cpu_maxVal); 262 } 263 } 264 265 ////////////////////////////////////////////////////////////////////// 266 // MinMaxLoc 267 268 PERF_TEST_P(Sz_Depth, MinMaxLoc, 269 Combine(CUDA_TYPICAL_MAT_SIZES, 270 Values(CV_8U, CV_16U, CV_32F, CV_64F))) 271 { 272 const cv::Size size = GET_PARAM(0); 273 const int depth = GET_PARAM(1); 274 275 cv::Mat src(size, depth); 276 if (depth == CV_8U) 277 cv::randu(src, 0, 254); 278 else 279 declare.in(src, WARMUP_RNG); 280 281 if (PERF_RUN_CUDA()) 282 { 283 const cv::cuda::GpuMat d_src(src); 284 double gpu_minVal, gpu_maxVal; 285 cv::Point gpu_minLoc, gpu_maxLoc; 286 287 TEST_CYCLE() cv::cuda::minMaxLoc(d_src, &gpu_minVal, &gpu_maxVal, &gpu_minLoc, &gpu_maxLoc); 288 289 SANITY_CHECK(gpu_minVal, 1e-10); 290 SANITY_CHECK(gpu_maxVal, 1e-10); 291 } 292 else 293 { 294 double cpu_minVal, cpu_maxVal; 295 cv::Point cpu_minLoc, cpu_maxLoc; 296 297 TEST_CYCLE() cv::minMaxLoc(src, &cpu_minVal, &cpu_maxVal, &cpu_minLoc, &cpu_maxLoc); 298 299 SANITY_CHECK(cpu_minVal); 300 SANITY_CHECK(cpu_maxVal); 301 } 302 } 303 304 ////////////////////////////////////////////////////////////////////// 305 // CountNonZero 306 307 PERF_TEST_P(Sz_Depth, CountNonZero, 308 Combine(CUDA_TYPICAL_MAT_SIZES, 309 Values(CV_8U, CV_16U, CV_32F, CV_64F))) 310 { 311 const cv::Size size = GET_PARAM(0); 312 const int depth = GET_PARAM(1); 313 314 cv::Mat src(size, depth); 315 declare.in(src, WARMUP_RNG); 316 317 if (PERF_RUN_CUDA()) 318 { 319 const cv::cuda::GpuMat d_src(src); 320 int gpu_dst = 0; 321 322 TEST_CYCLE() gpu_dst = cv::cuda::countNonZero(d_src); 323 324 SANITY_CHECK(gpu_dst); 325 } 326 else 327 { 328 int cpu_dst = 0; 329 330 TEST_CYCLE() cpu_dst = cv::countNonZero(src); 331 332 SANITY_CHECK(cpu_dst); 333 } 334 } 335 336 ////////////////////////////////////////////////////////////////////// 337 // Reduce 338 339 CV_ENUM(ReduceCode, REDUCE_SUM, REDUCE_AVG, REDUCE_MAX, REDUCE_MIN) 340 341 enum {Rows = 0, Cols = 1}; 342 CV_ENUM(ReduceDim, Rows, Cols) 343 344 DEF_PARAM_TEST(Sz_Depth_Cn_Code_Dim, cv::Size, MatDepth, MatCn, ReduceCode, ReduceDim); 345 346 PERF_TEST_P(Sz_Depth_Cn_Code_Dim, Reduce, 347 Combine(CUDA_TYPICAL_MAT_SIZES, 348 Values(CV_8U, CV_16U, CV_16S, CV_32F), 349 Values(1, 2, 3, 4), 350 ReduceCode::all(), 351 ReduceDim::all())) 352 { 353 const cv::Size size = GET_PARAM(0); 354 const int depth = GET_PARAM(1); 355 const int channels = GET_PARAM(2); 356 const int reduceOp = GET_PARAM(3); 357 const int dim = GET_PARAM(4); 358 359 const int type = CV_MAKE_TYPE(depth, channels); 360 361 cv::Mat src(size, type); 362 declare.in(src, WARMUP_RNG); 363 364 if (PERF_RUN_CUDA()) 365 { 366 const cv::cuda::GpuMat d_src(src); 367 cv::cuda::GpuMat dst; 368 369 TEST_CYCLE() cv::cuda::reduce(d_src, dst, dim, reduceOp, CV_32F); 370 371 CUDA_SANITY_CHECK(dst); 372 } 373 else 374 { 375 cv::Mat dst; 376 377 TEST_CYCLE() cv::reduce(src, dst, dim, reduceOp, CV_32F); 378 379 CPU_SANITY_CHECK(dst); 380 } 381 } 382 383 ////////////////////////////////////////////////////////////////////// 384 // Normalize 385 386 DEF_PARAM_TEST(Sz_Depth_NormType, cv::Size, MatDepth, NormType); 387 388 PERF_TEST_P(Sz_Depth_NormType, Normalize, 389 Combine(CUDA_TYPICAL_MAT_SIZES, 390 Values(CV_8U, CV_16U, CV_32F, CV_64F), 391 Values(NormType(cv::NORM_INF), 392 NormType(cv::NORM_L1), 393 NormType(cv::NORM_L2), 394 NormType(cv::NORM_MINMAX)))) 395 { 396 const cv::Size size = GET_PARAM(0); 397 const int type = GET_PARAM(1); 398 const int norm_type = GET_PARAM(2); 399 400 const double alpha = 1; 401 const double beta = 0; 402 403 cv::Mat src(size, type); 404 declare.in(src, WARMUP_RNG); 405 406 if (PERF_RUN_CUDA()) 407 { 408 const cv::cuda::GpuMat d_src(src); 409 cv::cuda::GpuMat dst; 410 411 TEST_CYCLE() cv::cuda::normalize(d_src, dst, alpha, beta, norm_type, type, cv::cuda::GpuMat()); 412 413 CUDA_SANITY_CHECK(dst, 1e-6); 414 } 415 else 416 { 417 cv::Mat dst; 418 419 TEST_CYCLE() cv::normalize(src, dst, alpha, beta, norm_type, type); 420 421 CPU_SANITY_CHECK(dst); 422 } 423 } 424 425 ////////////////////////////////////////////////////////////////////// 426 // MeanStdDev 427 428 PERF_TEST_P(Sz, MeanStdDev, 429 CUDA_TYPICAL_MAT_SIZES) 430 { 431 const cv::Size size = GetParam(); 432 433 cv::Mat src(size, CV_8UC1); 434 declare.in(src, WARMUP_RNG); 435 436 437 if (PERF_RUN_CUDA()) 438 { 439 const cv::cuda::GpuMat d_src(src); 440 cv::Scalar gpu_mean; 441 cv::Scalar gpu_stddev; 442 443 TEST_CYCLE() cv::cuda::meanStdDev(d_src, gpu_mean, gpu_stddev); 444 445 SANITY_CHECK(gpu_mean); 446 SANITY_CHECK(gpu_stddev); 447 } 448 else 449 { 450 cv::Scalar cpu_mean; 451 cv::Scalar cpu_stddev; 452 453 TEST_CYCLE() cv::meanStdDev(src, cpu_mean, cpu_stddev); 454 455 SANITY_CHECK(cpu_mean); 456 SANITY_CHECK(cpu_stddev); 457 } 458 } 459 460 ////////////////////////////////////////////////////////////////////// 461 // Integral 462 463 PERF_TEST_P(Sz, Integral, 464 CUDA_TYPICAL_MAT_SIZES) 465 { 466 const cv::Size size = GetParam(); 467 468 cv::Mat src(size, CV_8UC1); 469 declare.in(src, WARMUP_RNG); 470 471 if (PERF_RUN_CUDA()) 472 { 473 const cv::cuda::GpuMat d_src(src); 474 cv::cuda::GpuMat dst; 475 476 TEST_CYCLE() cv::cuda::integral(d_src, dst); 477 478 CUDA_SANITY_CHECK(dst); 479 } 480 else 481 { 482 cv::Mat dst; 483 484 TEST_CYCLE() cv::integral(src, dst); 485 486 CPU_SANITY_CHECK(dst); 487 } 488 } 489 490 ////////////////////////////////////////////////////////////////////// 491 // IntegralSqr 492 493 PERF_TEST_P(Sz, IntegralSqr, 494 CUDA_TYPICAL_MAT_SIZES) 495 { 496 const cv::Size size = GetParam(); 497 498 cv::Mat src(size, CV_8UC1); 499 declare.in(src, WARMUP_RNG); 500 501 if (PERF_RUN_CUDA()) 502 { 503 const cv::cuda::GpuMat d_src(src); 504 cv::cuda::GpuMat dst; 505 506 TEST_CYCLE() cv::cuda::sqrIntegral(d_src, dst); 507 508 CUDA_SANITY_CHECK(dst); 509 } 510 else 511 { 512 FAIL_NO_CPU(); 513 } 514 } 515
