| /art/runtime/interpreter/mterp/mips64/ |
| op_double_to_int.S | 7 dmtc1 t0, f1
|
| op_double_to_long.S | 7 dmtc1 t0, f1
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| li-d.d | 30 [0-9a-f]+ <[^>]*> dmtc1 at,\$f0
|
| micromips.s | [all...] |
| mips-gp64-fp64.d | 64 d4: 44a10000 dmtc1 at,\$f0
|
| mips-gp64-fp64.s | 68 # 00d4 dmtc1 at,$f0
|
| mips-gp64-fp64-pic.d | 88 138: 44a10000 dmtc1 at,\$f0
|
| mips-gp64-fp64-pic.s | 114 # 0180 dmtc1 at,$f0
|
| micromips-insn32.d | [all...] |
| micromips-noinsn32.d | [all...] |
| micromips-trap.d | [all...] |
| micromips.d | [all...] |
| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips3.s | 27 dmtc1 $s0,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips4.s | 25 dmtc1 $s0,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips5.s | 25 dmtc1 $s0,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips3.s | 23 dmtc1 $s0,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips4.s | 23 dmtc1 $s0,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips5.s | 23 dmtc1 $s0,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /art/runtime/arch/mips64/ |
| quick_entrypoints_mips64.S | [all...] |
| /external/v8/src/compiler/mips64/ |
| code-generator-mips64.cc | [all...] |
| /external/v8/src/mips64/ |
| macro-assembler-mips64.cc | [all...] |
| /external/v8/test/cctest/ |
| test-macro-assembler-mips64.cc | 744 __ dmtc1(a0, f4);
758 __ dmtc1(a0, f4);
775 __ dmtc1(v1, f2);
[all...] |
| /external/llvm/test/MC/Mips/mips3/ |
| valid.s | 77 dmtc1 $s0,$f14
|
| /external/llvm/test/MC/Mips/mips4/ |
| valid.s | 81 dmtc1 $s0,$f14
|
| /external/llvm/test/MC/Mips/mips5/ |
| valid.s | 81 dmtc1 $s0,$f14
|
