1 %include "mips64/fcvtHeader.S" { "suffix":"_DOUBLE", "valreg":"f0" } 2 /* 3 * TODO: simplify this when the MIPS64R6 emulator 4 * supports NAN2008=1. 5 */ 6 dli t0, INT_MIN_AS_DOUBLE 7 dmtc1 t0, f1 8 cmp.le.d f1, f1, f0 9 bc1nez f1, .L${opcode}_trunc 10 cmp.eq.d f1, f0, f0 11 li t0, INT_MIN 12 mfc1 t1, f1 13 and t0, t0, t1 14 b .L${opcode}_done 15 %break 16 .L${opcode}_trunc: 17 trunc.w.d f0, f0 18 mfc1 t0, f0 19 .L${opcode}_done: 20 /* Can't include fcvtFooter.S after break */ 21 GET_INST_OPCODE v0 # extract opcode from rINST 22 SET_VREG t0, a1 23 GOTO_OPCODE v0 # jump to next instruction 24
